Add initial support for the stm32f429idiscovery eval board (#38)

* Add stm32f429 registers

Generated using regz with:

./regz STM32F429.svd > registers.zig

Using this SVD:

871761af63/data/STMicro/STM32F429.svd

* Add initial support for the stm32f429idiscovery eval board

Blinky example working on the board

build.zig

@@ -23,6 +23,7 @@ pub fn build(b: *std.build.Builder) !void {
         //BuildConfig{ .name = "chips.stm32f103x8", .backing = Backing{ .chip = chips.stm32f103x8 } },
         BuildConfig{ .name = "boards.stm32f3discovery", .backing = Backing{ .board = boards.stm32f3discovery }, .supports_uart_test = false },
         BuildConfig{ .name = "boards.stm32f4discovery", .backing = Backing{ .board = boards.stm32f4discovery }, .supports_uart_test = false },
+        BuildConfig{ .name = "boards.stm32f429idiscovery", .backing = Backing{ .board = boards.stm32f429idiscovery }, .supports_uart_test = false },
     };
 
     const Test = struct { name: []const u8, source: []const u8, uses_uart: bool = false, on_avr: bool = true };

src/modules/boards.zig

@@ -31,3 +31,9 @@ pub const stm32f4discovery = Board{
     .path = root_path ++ "boards/stm32f4discovery/stm32f4discovery.zig",
     .chip = chips.stm32f407vg,
 };
+
+pub const stm32f429idiscovery = Board{
+    .name = "STM32F429IDISCOVERY",
+    .path = root_path ++ "boards/stm32f429idiscovery/stm32f429idiscovery.zig",
+    .chip = chips.stm32f429zit6u,
+};

src/modules/boards/stm32f429idiscovery/stm32f429idiscovery.zig

@@ -0,0 +1,15 @@
+pub const chip = @import("chip");
+pub const micro = @import("microzig");
+
+pub const cpu_frequency = 16_000_000;
+
+pub const pin_map = .{
+    // LEDs, connected to GPIOG bits 13, 14
+    // green
+    .@"LD3" = "PG13",
+    // red
+    .@"LD4" = "PG14",
+
+    // User button
+    .@"B1" = "PA0",
+};

src/modules/chips.zig

@@ -62,6 +62,18 @@ pub const stm32f407vg = Chip{
     },
 };
 
+pub const stm32f429zit6u = Chip{
+    .name = "STM32F429ZIT6U",
+    .path = root_path ++ "chips/stm32f429/stm32f429.zig",
+    .cpu = cpus.cortex_m4,
+    .memory_regions = &.{
+        MemoryRegion{ .offset = 0x08000000, .length = 2048 * 1024, .kind = .flash },
+        MemoryRegion{ .offset = 0x20000000, .length = 192 * 1024, .kind = .ram },
+        // CCM RAM
+        MemoryRegion{ .offset = 0x10000000, .length = 64 * 1024, .kind = .ram },
+    },
+};
+
 pub const nrf52832 = Chip{
     .name = "nRF52832",
     .path = root_path ++ "chips/nrf52/nrf52.zig",

src/modules/chips/stm32f429/stm32f429.zig

@@ -0,0 +1,78 @@
+//! For now we keep all clock settings on the chip defaults.
+//! This code should work with all the STM32F42xx line
+//!
+//! Specifically, TIM6 is running on a 16 MHz clock,
+//! HSI = 16 MHz is the SYSCLK after reset
+//! default AHB prescaler = /1 (= values 0..7):
+//!
+//! ```
+//! regs.RCC.CFGR.modify(.{ .HPRE = 0 });
+//! ```
+//!
+//! so also HCLK = 16 MHz.
+//! And with the default APB1 prescaler = /1:
+//!
+//! ```
+//! regs.RCC.CFGR.modify(.{ .PPRE1 = 0 });
+//! ```
+//!
+//! results in PCLK1 = 16 MHz.
+//!
+//! TODO: add more clock calculations when adding Uart
+
+const std = @import("std");
+const micro = @import("microzig");
+const chip = @import("registers.zig");
+const regs = chip.registers;
+
+pub usingnamespace chip;
+
+pub fn parsePin(comptime spec: []const u8) type {
+    const invalid_format_msg = "The given pin '" ++ spec ++ "' has an invalid format. Pins must follow the format \"P{Port}{Pin}\" scheme.";
+
+    if (spec[0] != 'P')
+        @compileError(invalid_format_msg);
+    if (spec[1] < 'A' or spec[1] > 'K')
+        @compileError(invalid_format_msg);
+
+    const pin_number: comptime_int = std.fmt.parseInt(u4, spec[2..], 10) catch @compileError(invalid_format_msg);
+
+    return struct {
+        /// 'A'...'K'
+        const gpio_port_name = spec[1..2];
+        const gpio_port = @field(regs, "GPIO" ++ gpio_port_name);
+        const suffix = std.fmt.comptimePrint("{d}", .{pin_number});
+    };
+}
+
+fn setRegField(reg: anytype, comptime field_name: anytype, value: anytype) void {
+    var temp = reg.read();
+    @field(temp, field_name) = value;
+    reg.write(temp);
+}
+
+pub const gpio = struct {
+    pub fn setOutput(comptime pin: type) void {
+        setRegField(regs.RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1);
+        setRegField(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b01);
+    }
+
+    pub fn setInput(comptime pin: type) void {
+        setRegField(regs.RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1);
+        setRegField(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b00);
+    }
+
+    pub fn read(comptime pin: type) micro.gpio.State {
+        const idr_reg = pin.gpio_port.IDR;
+        const reg_value = @field(idr_reg.read(), "IDR" ++ pin.suffix); // TODO extract to getRegField()?
+        return @intToEnum(micro.gpio.State, reg_value);
+    }
+
+    pub fn write(comptime pin: type, state: micro.gpio.State) void {
+        _ = pin;
+        switch (state) {
+            .low => setRegField(pin.gpio_port.BSRR, "BR" ++ pin.suffix, 1),
+            .high => setRegField(pin.gpio_port.BSRR, "BS" ++ pin.suffix, 1),
+        }
+    }
+};

tests/blinky.zig

@@ -7,6 +7,7 @@ const led_pin = if (micro.config.has_board)
         .@"mbed LPC1768" => micro.Pin("LED-1"),
         .@"STM32F3DISCOVERY" => micro.Pin("LD3"),
         .@"STM32F4DISCOVERY" => micro.Pin("LD5"),
+        .@"STM32F429IDISCOVERY" => micro.Pin("LD4"),
         else => @compileError("unknown board"),
     }
 else switch (micro.config.chip_name) {