enable atsamd51j19 fpu (#196)

wch-ch32v003
Jacob Young 2 months ago committed by GitHub
parent fcb68ad0e2
commit 4d3d5cce0d
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GPG Key ID: B5690EEEBB952194

@ -17,7 +17,7 @@ pub const chips = struct {
.chip = .{ .chip = .{
.name = "ATSAMD51J19A", .name = "ATSAMD51J19A",
.url = "https://www.microchip.com/en-us/product/ATSAMD51J19A", .url = "https://www.microchip.com/en-us/product/ATSAMD51J19A",
.cpu = MicroZig.cpus.cortex_m4, .cpu = MicroZig.cpus.cortex_m4f,
.register_definition = .{ .register_definition = .{
.atdf = .{ .cwd_relative = build_root ++ "/src/chips/ATSAMD51J19A.atdf" }, .atdf = .{ .cwd_relative = build_root ++ "/src/chips/ATSAMD51J19A.atdf" },
}, },

@ -71,6 +71,18 @@ pub const cpus = struct {
}, },
}; };
pub const cortex_m4f = MicroZig.Cpu{
.name = "ARM Cortex-M4F",
.root_source_file = .{ .path = build_root ++ "/src/cpus/cortex_m.zig" },
.target = std.zig.CrossTarget{
.cpu_arch = .thumb,
.cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m4 },
.cpu_features_add = std.Target.arm.featureSet(&.{.vfp4d16sp}),
.os_tag = .freestanding,
.abi = .eabihf,
},
};
pub const riscv32_imac = MicroZig.Cpu{ pub const riscv32_imac = MicroZig.Cpu{
.name = "RISC-V 32-bit", .name = "RISC-V 32-bit",
.root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/riscv32.zig" }, .root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/riscv32.zig" },

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