update to master (#52)

2 years ago · ac19b7de8e
parent 7fcaf17c46
commit ac19b7de8e
1 changed files with 1 additions and 1 deletions
--- a/src/modules/chips/lpc1768/lpc1768.zig
+++ b/src/modules/chips/lpc1768/lpc1768.zig
@ -163,7 +163,7 @@ pub fn Uart(comptime index: usize) type {
            const pclk = micro.clock.get() / 4;
            const divider = (pclk / (16 * config.baud_rate));
-            const regval = std.math.cast(u16, divider) catch return error.UnsupportedBaudRate;
+            const regval = std.math.cast(u16, divider) orelse return error.UnsupportedBaudRate;
            UARTn.DLL.modify(.{ .DLLSB = @truncate(u8, regval >> 0x00) });
            UARTn.DLM.modify(.{ .DLMSB = @truncate(u8, regval >> 0x08) });