Merge remote-tracking branch 'gd32/main' into merge_gd32

.buildkite/pipeline.yml

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+steps:
+  - group: Build
+    steps:
+    - command: zig build

.gitignore

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+zig-cache
+zig-out

LICENSE

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+Copyright (c) 2022 Zig Embedded Group Contributors
+
+This software is provided 'as-is', without any express or implied warranty. In
+no event will the authors be held liable for any damages arising from the use
+of this software.
+
+Permission is granted to anyone to use this software for any purpose, including
+commercial applications, and to alter it and redistribute it freely, subject to
+the following restrictions:
+
+1. The origin of this software must not be misrepresented; you must not claim
+that you wrote the original software. If you use this software in a product, an
+acknowledgment in the product documentation would be appreciated but is not
+required.
+
+2. Altered source versions must be plainly marked as such, and must not be
+misrepresented as being the original software.
+
+3. This notice may not be removed or altered from any source distribution.

README.adoc

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+= GigaDevice GD32 Hardware Support Package
+
+== What version of Zig to use
+
+Right now we are following https://ziglang.org/download/[master], but once 0.11.0 is released, we will be switching to the latest stable version of Zig.
+

build.zig

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+const std = @import("std");
+
+fn path(comptime suffix: []const u8) std.Build.LazyPath {
+    return .{
+        .cwd_relative = comptime ((std.fs.path.dirname(@src().file) orelse ".") ++ suffix),
+    };
+}
+
+const hal = .{
+    .source_file = path("/src/hals/GD32VF103.zig"),
+};
+
+pub const chips = struct {
+    pub const gd32vf103xb = .{
+        .preferred_format = .elf,
+        .chip = .{
+            .name = "GD32VF103",
+            .cpu = .riscv32_imac,
+            .memory_regions = &.{
+                .{ .offset = 0x08000000, .length = 128 * 1024, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 32 * 1024, .kind = .ram },
+            },
+            .register_definition = .{
+                .json = path("/src/chips/GD32VF103.json"),
+            },
+        },
+        .hal = hal,
+    };
+
+    pub const gd32vf103x8 = .{
+        .preferred_format = .elf,
+        .chip = .{
+            .name = "GD32VF103",
+            .cpu = .riscv32_imac,
+            .memory_regions = &.{
+                .{ .offset = 0x08000000, .length = 64 * 1024, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 20 * 1024, .kind = .ram },
+            },
+            .register_definition = .{
+                .json = path("/src/chips/GD32VF103.json"),
+            },
+        },
+        .hal = hal,
+    };
+};
+
+pub const boards = struct {
+    pub const sipeed = struct {
+        pub const longan_nano = .{
+            .preferred_format = .elf,
+            .chip = chips.gd32vf103xb.chip,
+            .hal = hal,
+            .board = .{
+                .name = "Longan Nano",
+                .url = "https://longan.sipeed.com/en/",
+                .source_file = path("/src/boards/longan_nano.zig"),
+            },
+        };
+    };
+};
+
+pub fn build(b: *std.build.Builder) void {
+    _ = b;
+    // const optimize = b.standardOptimizeOption(.{});
+    // inline for (@typeInfo(boards).Struct.decls) |decl| {
+    //     if (!decl.is_pub)
+    //         continue;
+
+    //     const exe = microzig.addEmbeddedExecutable(b, .{
+    //         .name = @field(boards, decl.name).name ++ ".minimal",
+    //         .source_file = .{
+    //             .path = "test/programs/minimal.zig",
+    //         },
+    //         .backing = .{ .board = @field(boards, decl.name) },
+    //         .optimize = optimize,
+    //     });
+    //     exe.installArtifact(b);
+    // }
+
+    // inline for (@typeInfo(chips).Struct.decls) |decl| {
+    //     if (!decl.is_pub)
+    //         continue;
+
+    //     const exe = microzig.addEmbeddedExecutable(b, .{
+    //         .name = @field(chips, decl.name).name ++ ".minimal",
+    //         .source_file = .{
+    //             .path = "test/programs/minimal.zig",
+    //         },
+    //         .backing = .{ .chip = @field(chips, decl.name) },
+    //         .optimize = optimize,
+    //     });
+    //     exe.installArtifact(b);
+    // }
+}

src/boards/longan_nano.zig

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+pub const chip = @import("chip");
+pub const micro = @import("microzig");
+
+pub const cpu_frequency = 8_000_000; // 8 MHz
+
+pub const pin_map = .{
+
+    // Port A
+    .PA0 = "PA0",
+    .PA1 = "PA1",
+    .PA2 = "PA2",
+    .PA3 = "PA3",
+    .PA4 = "PA4",
+    .PA5 = "PA5",
+    .PA6 = "PA6",
+    .PA7 = "PA7",
+    .PA8 = "PA8",
+    .PA9 = "PA9",
+    .PA10 = "PA10",
+    .PA11 = "PA11",
+    .PA12 = "PA12",
+    .PA13 = "PA13",
+
+    // Port B
+    .PB0 = "PB0",
+    .PB1 = "PB1",
+    .PB2 = "PB2",
+    .PB3 = "PB3",
+    .PB4 = "PB4",
+    .PB5 = "PB5",
+    .PB6 = "PB6",
+    .PB7 = "PB7",
+    .PB8 = "PB8",
+    .PB9 = "PB9",
+    .PB10 = "PB10",
+    .PB11 = "PB11",
+    .PB12 = "PB12",
+    .PB13 = "PB13",
+    .PB14 = "PB14",
+    .PB15 = "PB15",
+
+    // Port C
+    .PC0 = "PC0",
+    .PC1 = "PC1",
+    .PC2 = "PC2",
+    .PC3 = "PC3",
+    .PC4 = "PC4",
+    .PC5 = "PC5",
+    .PC6 = "PC6",
+    .PC7 = "PC7",
+    .PC8 = "PC8",
+    .PC9 = "PC9",
+    .PC10 = "PC10",
+    .PC11 = "PC11",
+    .PC12 = "PC12",
+    .PC13 = "PC13",
+    .PC14 = "PC14",
+    .PC15 = "PC15",
+
+    // Port D
+    .PD0 = "PD0",
+    .PD1 = "PD1",
+    .PD2 = "PD2",
+    .PD3 = "PD3",
+    .PD4 = "PD4",
+    .PD5 = "PD5",
+    .PD6 = "PD6",
+    .PD7 = "PD7",
+    .PD8 = "PD8",
+    .PD9 = "PD9",
+    .PD10 = "PD10",
+    .PD11 = "PD11",
+    .PD12 = "PD12",
+    .PD13 = "PD13",
+    .PD14 = "PD14",
+    .PD15 = "PD15",
+
+    // Port E
+    .PE0 = "PE0",
+    .PE1 = "PE1",
+    .PE2 = "PE2",
+    .PE3 = "PE3",
+    .PE4 = "PE4",
+    .PE5 = "PE5",
+    .PE6 = "PE6",
+    .PE7 = "PE7",
+    .PE8 = "PE8",
+    .PE9 = "PE9",
+    .PE10 = "PE10",
+    .PE11 = "PE11",
+    .PE12 = "PE12",
+    .PE13 = "PE13",
+    .PE14 = "PE14",
+    .PE15 = "PE15",
+
+    // Colors LED
+    // LCD_COLOR_WHITE     0xFFFF
+    // LCD_COLOR_BLACK     0x0000
+    // LCD_COLOR_GREY      0xF7DE
+    // LCD_COLOR_BLUE      0x001F
+    // LCD_COLOR_BLUE2     0x051F
+    // LCD_COLOR_RED       0xF800
+    // LCD_COLOR_MAGENTA   0xF81F
+    // LCD_COLOR_GREEN     0x07E0
+    // LCD_COLOR_CYAN      0x7FFF
+    // LCD_COLOR_YELLOW    0xFFE0
+};
+
+pub fn debugWrite(string: []const u8) void {
+    _ = string;
+    // TODO: implement
+}

src/hals/GD32VF103.zig

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+const micro = @import("microzig");
+const peripherals = micro.chip.peripherals;
+const UART3 = peripherals.UART3;
+const UART4 = peripherals.UART4;
+
+pub const clock_frequencies = .{
+    .cpu = 8_000_000, // 8 MHz
+};
+
+pub fn parse_pin(comptime spec: []const u8) type {
+    const invalid_format_msg = "The given pin '" ++ spec ++ "' has an invalid format. Pins must follow the format \"P{Port}{Pin}\" scheme.";
+
+    if (spec[0] != 'P')
+        @compileError(invalid_format_msg);
+    if (spec[1] < 'A' or spec[1] > 'E')
+        @compileError(invalid_format_msg);
+
+    return struct {
+        const pin_number: comptime_int = @import("std").fmt.parseInt(u2, spec[2..], 10) catch @compileError(invalid_format_msg);
+        // 'A'...'E'
+        const gpio_port_name = spec[1..2];
+        const gpio_port = @field(peripherals, "GPIO" ++ gpio_port_name);
+        const suffix = @import("std").fmt.comptimePrint("{d}", .{pin_number});
+    };
+}
+
+fn set_reg_field(reg: anytype, comptime field_name: anytype, value: anytype) void {
+    var temp = reg.read();
+    @field(temp, field_name) = value;
+    reg.write(temp);
+}
+
+pub const gpio = struct {
+    pub fn set_output(comptime pin: type) void {
+        _ = pin;
+        // TODO: check if pin is already configured as output
+    }
+    pub fn set_input(comptime pin: type) void {
+        _ = pin;
+        // TODO: check if pin is already configured as input
+    }
+
+    pub fn read(comptime pin: type) micro.gpio.State {
+        _ = pin;
+        // TODO: check if pin is configured as input
+        return .low;
+    }
+
+    pub fn write(comptime pin: type, state: micro.gpio.State) void {
+        _ = pin;
+        _ = state;
+        // TODO: check if pin is configured as output
+    }
+};
+
+pub const uart = struct {
+    pub const DataBits = enum(u2) {
+        five = 0,
+        six = 1,
+        seven = 2,
+        eight = 3,
+    };
+
+    pub const StopBits = enum(u1) {
+        one = 0,
+        two = 1,
+    };
+
+    pub const Parity = enum(u2) {
+        odd = 0,
+        even = 1,
+        mark = 2,
+        space = 3,
+    };
+};
+
+pub fn Uart(comptime index: usize, comptime pins: micro.uart.Pins) type {
+    if (pins.tx != null or pins.rx != null)
+        @compileError("TODO: custom pins are not currently supported");
+
+    return struct {
+        const UARTn = switch (index) {
+            0 => UART3,
+            1 => UART4,
+            else => @compileError("GD32VF103 has 2 UARTs available."),
+        };
+        const Self = @This();
+
+        pub fn init(config: micro.uart.Config) !Self {
+            _ = config;
+            return Self{};
+        }
+
+        pub fn can_write(self: Self) bool {
+            _ = self;
+            return false;
+        }
+        pub fn tx(self: Self, ch: u8) void {
+            _ = ch;
+            while (!self.can_write()) {} // Wait for Previous transmission
+        }
+
+        pub fn can_read(self: Self) bool {
+            _ = self;
+            return false;
+        }
+        pub fn rx(self: Self) u8 {
+            while (!self.can_read()) {} // Wait till the data is received
+            return 1; // Read received data
+        }
+    };
+}

test/programs/minimal.zig

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+const micro = @import("microzig");
+
+pub fn main() void {
+    // This function will contain the application logic.
+}