Microzig Generation 2 Build Interface (#21)

* MicroZig Gen 2 interface
* Adds ELF patching to handle the checksum requirement

---------

Co-authored-by: Felix "xq" Queißner <git@random-projects.net>
wch-ch32v003
Felix Queißner 1 year ago committed by GitHub
parent 32c4eacccf
commit 696e309f6d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23

3
.gitmodules vendored

@ -1,3 +0,0 @@
[submodule "deps/microzig"]
path = deps/microzig
url = https://github.com/ZigEmbeddedGroup/microzig.git

@ -1,38 +1,95 @@
const std = @import("std");
const microzig = @import("deps/microzig/build.zig");
pub const boards = @import("src/boards.zig");
pub const chips = @import("src/chips.zig");
fn path(comptime suffix: []const u8) std.Build.LazyPath {
return .{
.cwd_relative = comptime ((std.fs.path.dirname(@src().file) orelse ".") ++ suffix),
};
}
pub fn build(b: *std.build.Builder) void {
const optimize = b.standardOptimizeOption(.{});
inline for (@typeInfo(boards).Struct.decls) |decl| {
if (!decl.is_pub)
continue;
const hal = .{
.source_file = path("/src/hals/LPC176x5x.zig"),
};
const exe = microzig.addEmbeddedExecutable(b, .{
.name = @field(boards, decl.name).name ++ ".minimal",
.source_file = .{
.path = "test/programs/minimal.zig",
pub const chips = struct {
pub const lpc176x5x = .{
.preferred_format = .elf,
.chip = .{
// TODO: Separate over those chips, this is not generic!
.name = "LPC176x5x",
.cpu = .cortex_m3,
.memory_regions = &.{
.{ .offset = 0x00000000, .length = 512 * 1024, .kind = .flash },
.{ .offset = 0x10000000, .length = 32 * 1024, .kind = .ram },
.{ .offset = 0x2007C000, .length = 32 * 1024, .kind = .ram },
},
.backing = .{ .board = @field(boards, decl.name) },
.optimize = optimize,
});
exe.installArtifact(b);
}
inline for (@typeInfo(chips).Struct.decls) |decl| {
if (!decl.is_pub)
continue;
.register_definition = .{
.json = path("/src/chips/LPC176x5x.json"),
},
},
.hal = hal,
.binary_post_process = postprocess,
};
};
const exe = microzig.addEmbeddedExecutable(b, .{
.name = @field(chips, decl.name).name ++ ".minimal",
.source_file = .{
.path = "test/programs/minimal.zig",
pub const boards = struct {
pub const mbed = struct {
pub const lpc1768 = .{
.preferred_format = .hex,
.chip = chips.lpc176x5x.chip,
.hal = hal,
.board = .{
.name = "mbed LPC1768",
.url = "https://os.mbed.com/platforms/mbed-LPC1768/",
.source_file = path("/src/boards/mbed_LPC1768.zig"),
},
.backing = .{ .chip = @field(chips, decl.name) },
.optimize = optimize,
.binary_post_process = postprocess,
};
};
};
/// Post-processes an ELF file to add a checksum over the first 8 words so the
/// cpu will properly boot.
fn postprocess(b: *std.Build, input: std.Build.LazyPath) std.Build.LazyPath {
const patchelf = b.addExecutable(.{
.name = "lpc176x5x-patchelf",
.root_source_file = path("/src/tools/patchelf.zig"),
});
exe.installArtifact(b);
}
const patch = b.addRunArtifact(patchelf);
patch.addFileArg(input);
return patch.addOutputFileArg("firmware.elf");
}
pub fn build(b: *std.Build) void {
_ = b;
// const optimize = b.standardOptimizeOption(.{});
// inline for (@typeInfo(boards).Struct.decls) |decl| {
// if (!decl.is_pub)
// continue;
// const exe = microzig.addEmbeddedExecutable(b, .{
// .name = @field(boards, decl.name).name ++ ".minimal",
// .source_file = .{
// .path = "test/programs/minimal.zig",
// },
// .backing = .{ .board = @field(boards, decl.name) },
// .optimize = optimize,
// });
// exe.installArtifact(b);
// }
// inline for (@typeInfo(chips).Struct.decls) |decl| {
// if (!decl.is_pub)
// continue;
// const exe = microzig.addEmbeddedExecutable(b, .{
// .name = @field(chips, decl.name).name ++ ".minimal",
// .source_file = .{
// .path = "test/programs/minimal.zig",
// },
// .backing = .{ .chip = @field(chips, decl.name) },
// .optimize = optimize,
// });
// exe.installArtifact(b);
// }
}

1
deps/microzig vendored

@ -1 +0,0 @@
Subproject commit 9392fe0f7bddde26155c181ab80b70097b49c791

@ -1,13 +0,0 @@
const std = @import("std");
const micro = @import("../deps/microzig/build.zig");
const chips = @import("chips.zig");
fn root_dir() []const u8 {
return std.fs.path.dirname(@src().file) orelse ".";
}
pub const mbed_lpc1768 = micro.Board{
.name = "mbed LPC1768",
.source = .{ .path = root_dir() ++ "/boards/mbed_LPC1768.zig" },
.chip = chips.lpc176x5x,
};

@ -1,18 +0,0 @@
const std = @import("std");
const micro = @import("../deps/microzig/build.zig");
const Chip = micro.Chip;
const MemoryRegion = micro.MemoryRegion;
fn root_dir() []const u8 {
return std.fs.path.dirname(@src().file) orelse unreachable;
}
pub const lpc176x5x = Chip.from_standard_paths(root_dir(), .{
.name = "LPC176x5x",
.cpu = micro.cpus.cortex_m3,
.memory_regions = &.{
MemoryRegion{ .offset = 0x00000000, .length = 512 * 1024, .kind = .flash },
MemoryRegion{ .offset = 0x10000000, .length = 32 * 1024, .kind = .ram },
MemoryRegion{ .offset = 0x2007C000, .length = 32 * 1024, .kind = .ram },
},
});

File diff suppressed because it is too large Load Diff

@ -63,7 +63,7 @@ pub fn parse_pin(comptime spec: []const u8) type {
pub fn route_pin(comptime pin: type, function: PinTarget) void {
var val = pin.regs.pinsel_reg.read();
@field(val, pin.regs.pinsel_field) = @enumToInt(function);
@field(val, pin.regs.pinsel_field) = @intFromEnum(function);
pin.regs.pinsel_reg.write(val);
}
@ -138,19 +138,19 @@ pub fn Uart(comptime index: usize, comptime pins: micro.uart.Pins) type {
switch (index) {
0 => {
SYSCON.PCONP.modify(.{ .PCUART0 = 1 });
SYSCON.PCLKSEL0.modify(.{ .PCLK_UART0 = @enumToInt(uart.CClkDiv.four) });
SYSCON.PCLKSEL0.modify(.{ .PCLK_UART0 = @intFromEnum(uart.CClkDiv.four) });
},
1 => {
SYSCON.PCONP.modify(.{ .PCUART1 = 1 });
SYSCON.PCLKSEL0.modify(.{ .PCLK_UART1 = @enumToInt(uart.CClkDiv.four) });
SYSCON.PCLKSEL0.modify(.{ .PCLK_UART1 = @intFromEnum(uart.CClkDiv.four) });
},
2 => {
SYSCON.PCONP.modify(.{ .PCUART2 = 1 });
SYSCON.PCLKSEL1.modify(.{ .PCLK_UART2 = @enumToInt(uart.CClkDiv.four) });
SYSCON.PCLKSEL1.modify(.{ .PCLK_UART2 = @intFromEnum(uart.CClkDiv.four) });
},
3 => {
SYSCON.PCONP.modify(.{ .PCUART3 = 1 });
SYSCON.PCLKSEL1.modify(.{ .PCLK_UART3 = @enumToInt(uart.CClkDiv.four) });
SYSCON.PCLKSEL1.modify(.{ .PCLK_UART3 = @intFromEnum(uart.CClkDiv.four) });
},
else => unreachable,
}
@ -158,10 +158,10 @@ pub fn Uart(comptime index: usize, comptime pins: micro.uart.Pins) type {
UARTn.LCR.modify(.{
// 8N1
.WLS = @enumToInt(config.data_bits),
.SBS = @enumToInt(config.stop_bits),
.WLS = @intFromEnum(config.data_bits),
.SBS = @intFromEnum(config.stop_bits),
.PE = if (config.parity != null) @as(u1, 1) else @as(u1, 0),
.PS = if (config.parity) |p| @enumToInt(p) else @enumToInt(uart.Parity.odd),
.PS = if (config.parity) |p| @intFromEnum(p) else @intFromEnum(uart.Parity.odd),
.BC = 0,
.DLAB = 1,
});
@ -180,8 +180,8 @@ pub fn Uart(comptime index: usize, comptime pins: micro.uart.Pins) type {
const regval = std.math.cast(u16, divider) orelse return error.UnsupportedBaudRate;
UARTn.DLL.modify(.{ .DLLSB = @truncate(u8, regval >> 0x00) });
UARTn.DLM.modify(.{ .DLMSB = @truncate(u8, regval >> 0x08) });
UARTn.DLL.modify(.{ .DLLSB = @as(u8, @truncate(regval >> 0x00)) });
UARTn.DLM.modify(.{ .DLMSB = @as(u8, @truncate(regval >> 0x08)) });
UARTn.LCR.modify(.{ .DLAB = 0 });

@ -0,0 +1,66 @@
const std = @import("std");
pub fn main() !u8 {
const argv = try std.process.argsAlloc(std.heap.page_allocator);
defer std.process.argsFree(std.heap.page_allocator, argv);
if (argv.len != 3) {
std.log.err("usage: lpc-patchelf <input> <output>", .{});
return 1;
}
const input_file_name = argv[1];
const output_file_name = argv[2];
try std.fs.Dir.copyFile(
std.fs.cwd(),
input_file_name,
std.fs.cwd(),
output_file_name,
.{},
);
var file = try std.fs.cwd().openFile(output_file_name, .{ .mode = .read_write });
defer file.close();
const header = try std.elf.Header.read(file);
var iter = header.program_header_iterator(file);
while (try iter.next()) |phdr| {
if (phdr.p_type != std.elf.PT_LOAD) {
continue;
}
if (phdr.p_paddr != 0) {
// std.log.warn("LOAD program header is not located at address 0x00000000!", .{});
break;
}
const boot_sector_items = 8;
const boot_sector_size = @sizeOf([boot_sector_items]u32);
if (phdr.p_filesz < boot_sector_size) {
std.log.warn("boot header is too small! Expected {} bytes, but sector only has {} bytes!", .{
boot_sector_size,
phdr.p_filesz,
});
continue;
}
try file.seekTo(phdr.p_offset);
var reader = file.reader();
var writer = file.writer();
var checksum: u32 = 0;
var i: usize = 0;
while (i < boot_sector_items - 1) : (i += 1) {
const item = try reader.readIntLittle(u32);
checksum -%= item;
}
try writer.writeIntLittle(u32, checksum);
}
return 0;
}
Loading…
Cancel
Save