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Jacob Peters 44201d5370 Add core registers for Cortex M0 and M0+ (#86) ... * Refactored core register functions Most of this was just renaming function calls * More refactoring * Added calls to the core register functions * Return error on missing NvicPrioBits * Added function to check the value of vendor _systick_config This should work but it is a bit brittle. If vendorSystickConfig isn't lowercase for false it will return true * Add extra check for vendor_systick_config * fix formatting		7 months ago
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arch	initial vector table support for arm (#80)	7 months ago
svd	Add core registers for Cortex M0 and M0+ (#86)	7 months ago
Database.zig	SVD: peripheral derivation (#84)	7 months ago
atdf.zig	initial vector table support for arm (#80)	7 months ago
characterize.zig	Characterize (#60)	7 months ago
cmsis-svd.xsd	big initial commit, thanks kprotty for helping with MmioInt()	7 months ago
contextualize-fields.zig	Rearchitect Regz (#63)	7 months ago
dslite.zig	Rearchitect Regz (#63)	7 months ago
gen.zig	SVD: peripheral derivation (#84)	7 months ago
main.zig	SVD: peripheral derivation (#84)	7 months ago
mmio.zig	make InterruptVector public (#44)	7 months ago
output_tests.zig	regzon (#79)	7 months ago
regzon.zig	regzon (#79)	7 months ago
svd.zig	Add core registers for Cortex M0 and M0+ (#86)	7 months ago
testing.zig	regzon (#79)	7 months ago
xml.zig	Rearchitect Regz (#63)	7 months ago