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92a2922742
* build.zig: Trivial rename around UART test * mmio: Add writeRaw() to set a full register * UART: Add TODO for auto baud rate detection * STM32F30x Initial USART1 output/transmit support All code assumes default chip clock configuration. Code assumes STM32F303xB / STM32F3030xC. Code supports only 8 data bits, 1 stop bit. * stm32f3discovery @panic() to UART1 This is done by implementing `debugWrite()` for the board, which only initializes UART1 if that was not yet done, and flushes afterwards to make sure the host receives all. * stm32f303: Support UART1 reader This is done by implementing `rx()` and `canRead()`. * stm32f303 UART1 correctly support 7 and 8 bits This includes correctly masking the parity bit on reads. * stm32f3 UART1 support 0.5/1.5/2 stop bits * stm32f303 UART1 simplify parity code * Make work with regz-generated registers.zig change * After #23 repair Reset on stm32, lpc1768 |
3 years ago | |
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| .github/workflows | 3 years ago | |
| src | 3 years ago | |
| tests | 3 years ago | |
| .gitattributes | 3 years ago | |
| .gitignore | 3 years ago | |
| README.md | 3 years ago | |
| build.zig | 3 years ago | |
| thoughts.md | 3 years ago | |