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  • 3617b8b25f
         Added some function wrappers to EmbeddedExecutable that expose commonly used functionalities of LibExeObjStep (#77) David Sugar 2022-09-14 19:56:31 +0200
  • 9fa748ff13
         Pin config (#9) Matt Knight 2022-09-02 14:45:21 -0700
  • 20deb2cc3e
         Allow to specify VectorTable in app and hal. (#76) Vesim 2022-09-01 15:53:49 +0200
  • 68314b8f7e
         use stage1 until stage3 is ready (#75) Matt Knight 2022-08-24 23:17:08 -0700
  • e1244177fa
         Add comment about microzig.config (#74) Nicolas Goy 2022-08-10 08:02:08 +0200
  • b8d92b2539
         Make the microzig package public to allow it to be passed as dependency. (#73) Nicolas Goy 2022-08-02 04:02:01 +0200
  • a6f5324769 add list of boards in renode Matt Knight 2022-08-01 00:34:39 -0700
  • 2ae5eb6d02 init with empty test Matt Knight 2022-08-01 00:27:17 -0700
  • 1dd837ae43
         Initial commit Matt Knight 2022-08-01 00:26:02 -0700
  • a2dd362ce7
         Asciidoc (#71) Matt Knight 2022-07-27 01:58:46 -0700
  • 0936dfb05c
         improve build api (#70) Matt Knight 2022-07-27 01:08:27 -0700
  • d57f19c886
         Gd32v Support (#21) Matheus C. França 2022-07-24 16:38:32 -0300
  • 0cde03507b
         update github actions to reflect default branch name fix (#69) Matt Knight 2022-07-24 12:36:52 -0700
  • aab147d431
         only manage in-repo once it gets complicated (#68) Matt Knight 2022-07-24 11:58:34 -0700
  • 231508bf23
         move linux builds to buildkite (#67) Matt Knight 2022-07-24 10:22:59 -0700
  • e5b8d57c72
         Stm32f303 target speed trivial check (#66) Marnix Klooster 2022-07-23 19:43:39 +0200
  • f0e51f8302
         Uart (#8) Matt Knight 2022-07-14 00:09:47 -0700
  • e60d59ce49
         changing linker memory locations for stm32f103c8 (#65) Ethan Frei 2022-07-13 21:58:19 -0500
  • f75a019aa5
         try lf endings to fix windows compile error (#7) Matt Knight 2022-07-10 17:31:17 -0700
  • 2d89410305
         add directive to inline asm (#6) Matt Knight 2022-07-10 17:10:54 -0700
  • 8751f6753d
         Clock config (#5) Matt Knight 2022-07-10 16:26:47 -0700
  • 6bc3fc094b
         add hal or app level clock configuration (#62) Matt Knight 2022-07-10 09:03:20 -0700
  • e6d6ca7092
         generate registers with known cpu (#63) Matt Knight 2022-07-10 02:28:03 -0700
  • 9f3aa1e375
         Merge pull request #4 from mattnite/gpio-fix Matt Knight 2022-07-08 17:32:09 -0700
  • ed05258e7e clean up gpios Matt Knight 2022-07-08 16:52:14 -0700
  • 179047ab65
         fix colliding ISRs by making sure they each get memoized (#60) Matt Knight 2022-07-07 23:00:18 -0700
  • c71e73759c
         Merge pull request #3 from mattnite/busy-sleep Matt Knight 2022-07-07 21:44:01 -0700
  • 303c9f183f add busy sleep functions Matt Knight 2022-07-07 21:38:40 -0700
  • a400e36058
         I2C improvements (#58) Riccardo Binetti 2022-07-07 00:49:09 +0200
  • cbc9b56769
         Merge pull request #2 from ZigEmbeddedGroup/multicore Vesim 2022-07-07 00:19:11 +0200
  • 0659bcd8c6 multicore: use camelCase for function names Maciej 'vesim' Kuliński 2022-07-07 00:05:56 +0200
  • 7cf623aaf2
         stm32f407: use the correct bus frequency to calculate usartdiv (#57) Riccardo Binetti 2022-07-06 23:57:23 +0200
  • 5c6ef47aa2
         Merge pull request #1 from ZigEmbeddedGroup/multicore Matt Knight 2022-07-06 14:41:47 -0700
  • e541f966d4 multicore: add initial support Maciej 'vesim' Kuliński 2022-07-06 21:29:36 +0200
  • e202698a00
         pin: remove erroneous access to slice length (#56) Riccardo Binetti 2022-07-06 22:46:28 +0200
  • 5cf1a4612d
         uart: allow selecting the tx/rx pins (#54) Riccardo Binetti 2022-07-03 17:42:46 +0200
  • 7cfc924eed
         pin: omit board/chip namespace when parsing and saving the pin name (#55) Riccardo Binetti 2022-07-03 17:38:40 +0200
  • 7d68b0bcba pads bank bits set when setting gpio function Matt Knight 2022-07-03 07:52:26 -0700
  • 8720973005
         Add support for multiple clock domains (#53) Riccardo Binetti 2022-07-03 01:59:14 +0200
  • c2a6b718e7 add license Matt Knight 2022-06-07 01:20:38 -0700
  • a501e63286 init Matt Knight 2022-06-07 01:18:02 -0700
  • ac19b7de8e
         update to master (#52) Matt Knight 2022-05-29 12:53:28 -0700
  • 7fcaf17c46
         Adds logo (#50) Felix Queißner 2022-05-28 11:12:28 +0200
  • 423c886d2e
         Master update (#51) Felix Queißner 2022-05-28 10:37:14 +0200
  • d253056c71
         cortex-m0plus and fix for missing hal (#49) Matt Knight 2022-05-27 08:58:42 -0700
  • c418db51f6
         add hal package option (#48) Matt Knight 2022-05-19 18:58:46 -0700
  • 8a3ec5ba02
         Add vesim to LICENSE file (#47) Vesim 2022-04-27 10:46:59 +0200
  • 58d090644b
         Create LICENSE (#46) Matt Knight 2022-04-26 23:59:25 -0700
  • b9cd24ae96
         Improve STM32F407 Uart and introduce GPIO Alternate Function (#44) Riccardo Binetti 2022-04-14 07:08:41 +0200
  • 8b04413e55
         Add Uart to STM32F4Discovery and rework uart-sync example (#43) Riccardo Binetti 2022-04-13 23:06:05 +0200
  • c0e0423f5c
         Readme (#40) Matt Knight 2022-04-01 09:05:46 -0700
  • a6adc1d9da
         Implements a generic gpio button driver with basic debouncing. (#41) Felix Queißner 2022-04-01 10:30:13 +0200
  • 873e5995b6
         Add initial support for the stm32f429idiscovery eval board (#38) Riccardo Binetti 2022-04-01 02:45:50 +0200
  • f317ce0c9f
         More improvements (#37) Felix Queißner 2022-03-31 12:06:01 +0200
  • d3c539e35b
         Avr fixes (#36) Felix Queißner 2022-03-31 09:13:36 +0200
  • 97733da9e2
         Add initial support for the stm32f4discovery eval board (#35) Riccardo Binetti 2022-03-29 07:40:34 +0200
  • 04bf2c4d4a
         Initial I2C support (#26) Marnix Klooster 2022-03-22 09:10:23 +0100
  • ba8feaed74
         fix missing vector table on ARM (#34) Matt Knight 2022-03-19 14:48:32 -0700
  • e44d8bf576
         use the 'Signal' calling convention by default on AVR for ISRs, allow to explicitly use signal or interrupt calling conventions (#32) Matt Knight 2022-03-18 23:53:21 -0700
  • 4384c5e9fa
         use interrupt calling convention for avr (#31) Matt Knight 2022-03-18 23:28:59 -0700
  • e639dc7983
         panic exporting is no longer needed. (#30) Felix Queißner 2022-03-15 09:59:09 +0100
  • b2793e2589
         Avr interrupt overloading (#29) Matt Knight 2022-03-15 01:24:58 -0700
  • 823ff6577f
         Greatly simplifies the package logic by using a proxy-to-root package. (#28) Felix Queißner 2022-03-15 08:41:59 +0100
  • b01bb102ca Fixes some tiny fixes. Felix "xq" Queißner 2022-03-14 18:09:46 +0100
  • f1ca55f6c3 Update to latest master. Felix "xq" Queißner 2022-03-14 18:04:01 +0100
  • 5cb8cf60e4 make website looks good on mobile Leap of Azzam 2022-03-14 23:03:04 +0700
  • 1c1730445c
         Brings AVR up to date (blink builds and blinks again! (#27) Felix Queißner 2022-03-14 17:10:00 +0100
  • 5050ce5eb0
         Diverse fixes (#25) Felix Queißner 2022-03-11 13:29:50 +0100
  • 92a2922742
         stm32f3discovery/stm32f303 Initial UART1 support, including @panic() (#20) Marnix Klooster 2022-03-10 22:42:31 +0100
  • d4120f9c99
         After #23 repair Reset on stm32, lpc1768 (#24) Marnix Klooster 2022-03-10 22:41:49 +0100
  • 74e22672d0
         use register code generated by regz (#23) Matt Knight 2022-03-03 06:02:10 -0800
  • 13f0a1e347
         instantiate vector table in start.zig (#22) Matt Knight 2022-03-02 22:37:52 -0800
  • c8de6a8668 WIP todo list OBenjaminT 2022-02-15 13:31:50 +0100
  • 6545cbd7e0 Remove all non-existent content OBenjaminT 2022-02-15 12:50:18 +0100
  • 8a5ee67588
         register arrays and clusters, nrf52 as well (#19) Matt Knight 2022-02-15 18:02:20 -0800
  • 6b85ecfdcf
         cortex-m3 set to thumb isa (#17) Matt Knight 2022-02-13 10:55:00 -0800
  • c34d8b73d5
         interrupt generation for chips (#16) Matt Knight 2022-02-13 10:33:13 -0800
  • 152db2ae5f
         no need to make the interrupt the .Naked calling convention (#15) Matt Knight 2022-02-12 14:06:34 -0800
  • 0124a14773
         Add interrupt declaration to cortex-m microcontrollers (#14) Matt Knight 2022-02-12 12:34:36 -0800
  • 23eb8d5658
         add packages to your embedded app (#13) Matt Knight 2022-02-12 10:30:58 -0800
  • 38110fb3bd
         calculate end-of-stack value from chip configs (#12) Matt Knight 2022-02-11 23:29:09 -0800
  • 1b5cc2ad1f
         Support STM32F3DISCOVERY board (#11) Marnix Klooster 2022-01-27 20:43:47 +0100
  • f46c2e4ea9
         Microzig as pkg (#10) Matt Knight 2022-01-08 12:48:20 -0800
  • 46a924234e
         add stm32f103 registers and reorganize so that microzig can be used as a package (#9) Matt Knight 2022-01-05 22:36:06 -0800
  • 5a1e72f380
         Create LinkerscriptStep (#7) Matt Knight 2022-01-05 19:12:55 -0800
  • af7aa777f9
         Freshen things up (#6) Matthew Knight 2021-10-18 18:22:13 -0700
  • 2a6bedfcca
         Update README.md Vesim 2021-06-07 19:22:13 +0200
  • eedc689738 Move lpc1768 to new generated SVD Vesim 2021-05-04 23:00:13 +0200
  • 74641abbf0 [svd2zig] Fix handling og non-exhaustive enums and resverd fields Vesim 2021-05-04 15:19:42 +0200
  • a4416fd2b7 [svd2zig] Add enumeration supports and fix bug for registers without fields Vesim 2021-05-04 14:56:51 +0200
  • 196c4c4d05 mbed LPC1768 only commit. This introduces a working UART abstraction for LPC1768, currently the uart-sync example has chip-related code in it. Felix (xq) Queißner 2021-04-30 22:11:50 +0200
  • 294cfebf7a Makes UART compile for LPC1768. Felix (xq) Queißner 2021-04-30 19:23:16 +0200
  • deb9c3fe03 Designs the basic uart frontend. Felix (xq) Queißner 2021-04-30 01:35:38 +0200
  • f5bc3be1ae Introduces the first SVD generated binding for LPC1768. svd2zig contains a hack for missing register sizes. Felix (xq) Queißner 2021-04-29 22:40:33 +0200
  • 1aad7b52f6 Ports over sbi, cbi to avr5.zig. Felix (xq) Queißner 2021-04-29 00:45:23 +0200
  • 284d19814d Implements blinky for AVR. Felix (xq) Queißner 2021-04-29 00:41:35 +0200
  • 26681f7b30 blinky works for lpc1768 Felix (xq) Queißner 2021-04-28 23:57:39 +0200
  • 6cdf641f32 Continues blinky setup. Felix (xq) Queißner 2021-04-28 22:36:29 +0200
  • e68a282981 Implements (untested) startup for AVR and LPC1768. Felix (xq) Queißner 2021-04-28 01:22:08 +0200
  • bbfdb421d8 File structure, draft 1 Felix (xq) Queißner 2021-04-27 21:32:09 +0200