* build.zig: Trivial rename around UART test
* mmio: Add writeRaw() to set a full register
* UART: Add TODO for auto baud rate detection
* STM32F30x Initial USART1 output/transmit support
All code assumes default chip clock configuration.
Code assumes STM32F303xB / STM32F3030xC.
Code supports only 8 data bits, 1 stop bit.
* stm32f3discovery @panic() to UART1
This is done by implementing `debugWrite()` for the board,
which only initializes UART1 if that was not yet done,
and flushes afterwards to make sure the host receives all.
* stm32f303: Support UART1 reader
This is done by implementing `rx()` and `canRead()`.
* stm32f303 UART1 correctly support 7 and 8 bits
This includes correctly masking the parity bit
on reads.
* stm32f3 UART1 support 0.5/1.5/2 stop bits
* stm32f303 UART1 simplify parity code
* stm32f303 I2C rough initial code
Allows only writing and reading single bytes.
* stm32f3 i2c: enable debug 'logging'
* Add a few comments
* I2C API changes, STM32F303 I2C multi-byte transfers
Now using controller/device terminology, instead of master/slave.
Now using 'transfer objects' to make STOPs and re-STARTs explicit,
and allow using Writer and Reader APIs.
Added 'register' abstraction.
STM32F303 I2C now supports this new API, and multi-byte transfers.
Now waiting for I2C_ISR.BUSY == 0, after setting I2C_CR2.STOP == 1.
Without this, the sequence write-stop-write caused an additional STOP
to be sent immediately the START and address of the second write.
* Make work with regz-generated registers.zig change
* Updated to match regz-generated update
* After #23 repair Reset on stm32, lpc1768
* Clean-up I2C `readRegisters()`.
* Refactor to separate read/write states
* On STM32F303, make second read call fail
Also doc comments to clarify the new API.
* STM32 I2C: Properly support multiple write calls
* I2C STM32: Fix release mode compile error
...on top of an earlier commit on this branch.
* I2C Add 'write register' shorthand functions
* Make sure vector_table is correctly exported
It needs to be a non-`comptime` `var` for `@export` to work properly.
The only 'documentation' for this behavior currently seems GitHub comment
https://github.com/ziglang/zig/issues/5157#issuecomment-618933196 .
This issue was introduced in 1c17304 for PR #27,
which broke at least ARM-based STM32F303.
* fix missing vector table on ARM
* Revert "Merge branch 'fix-vector_table-export' into marnix-master"
This reverts commit 8ea0a74e1031cd0b88abe0283f179f0cf20f450c, reversing
changes made to 355a3618080d28c5da6e044773e6449989355fe5.
* Temp commit for SPI
* Check new I2C target_speed config setting
* Corrected incorrect doc comment
* Initial SPI transfer support for STM32F303
* SPI device CS pin is now used
* Revert accidentally committed debug flag.
* SPI: Add shorthands for 'register-based' devices.
* Additional fix to remove PE3 pin dependency
* SPI: Renames, comments, extracted device-specific code
Specifically,
top-level `Spi` is now `SpiBus`;
and the internal API has an additional `switchToDevice()`,
and receives `DeviceConfig` in more places.
* SPI device: Add `transceive()` method.
---------
Co-authored-by: Matt Knight <mattnite@protonmail.com>
ziglang/zig#14181 changed the interface for overriding the log function.
Previously, you would define a public `root.log` function. Now, you
define a `root.std_options` namespace that has a `logFn` decl.
Signed-off-by: Aidan Oldershaw <aidan.oldershaw@gmail.com>
Matt Knight
Matt Knight
Vesim
Philipp Wendel
Marnix Klooster
Aidan Oldershaw
Felix Queißner
Connor Rigby
hollmmax
Felix "xq" Queißner