diff --git a/deps/microzig b/deps/microzig
index 681b3b0..15bc1fc 160000
--- a/deps/microzig
+++ b/deps/microzig
@@ -1 +1 @@
-Subproject commit 681b3b0d7a6b2fc5d0f8918c583c790c646a31f1
+Subproject commit 15bc1fc06da3b6c622a21fa438e40be247d9dee1
diff --git a/src/hal/uart.zig b/src/hal/uart.zig
index 49de5fc..3285249 100644
--- a/src/hal/uart.zig
+++ b/src/hal/uart.zig
@@ -75,12 +75,18 @@ pub const UART = enum {
     uart1,
 
     const WriteError = error{};
+    const ReadError = error{};
     pub const Writer = std.io.Writer(UART, WriteError, write);
+    pub const Reader = std.io.Reader(UART, ReadError, read);
 
     pub fn writer(uart: UART) Writer {
         return .{ .context = uart };
     }
 
+    pub fn reader(uart: UART) Reader {
+        return .{ .context = uart };
+    }
+
     fn getRegs(uart: UART) *volatile UartRegs {
         return &uarts[@enumToInt(uart)];
     }
@@ -142,6 +148,15 @@ pub const UART = enum {
         return payload.len;
     }
 
+    pub fn read(uart: UART, buffer: []u8) ReadError!usize {
+        const uart_regs = uart.getRegs();
+        for (buffer) |*byte| {
+            while (!uart.isReadable()) {}
+            byte.* = @truncate(u8, uart_regs.dr);
+        }
+        return buffer.len;
+    }
+
     pub fn readWord(uart: UART) u8 {
         const uart_regs = uart.getRegs();
         while (!uart.isReadable()) {}