diff --git a/build.zig b/build.zig index e570737..cb8771c 100644 --- a/build.zig +++ b/build.zig @@ -16,33 +16,34 @@ pub fn build(b: *std.build.Builder) !void { const BuildConfig = struct { name: []const u8, backing: Backing, supports_uart_test: bool = true }; const all_backings = [_]BuildConfig{ - //BuildConfig{ .name = "boards.arduino_nano", .backing = Backing{ .board = boards.arduino_nano } }, + BuildConfig{ .name = "boards.arduino_nano", .backing = Backing{ .board = boards.arduino_nano } }, BuildConfig{ .name = "boards.mbed_lpc1768", .backing = Backing{ .board = boards.mbed_lpc1768 } }, - //BuildConfig{ .name = "chips.atmega328p", .backing = Backing{ .chip = pkgs.chips.atmega328p } }, + BuildConfig{ .name = "chips.atmega328p", .backing = Backing{ .chip = chips.atmega328p } }, BuildConfig{ .name = "chips.lpc1768", .backing = Backing{ .chip = chips.lpc1768 } }, //BuildConfig{ .name = "chips.stm32f103x8", .backing = Backing{ .chip = chips.stm32f103x8 } }, BuildConfig{ .name = "boards.stm32f3discovery", .backing = Backing{ .board = boards.stm32f3discovery }, .supports_uart_test = false }, }; - const Test = struct { name: []const u8, source: []const u8, uses_uart: bool = false }; + const Test = struct { name: []const u8, source: []const u8, uses_uart: bool = false, on_avr: bool = true }; const all_tests = [_]Test{ Test{ .name = "minimal", .source = "tests/minimal.zig" }, Test{ .name = "blinky", .source = "tests/blinky.zig" }, - Test{ .name = "uart-sync", .source = "tests/uart-sync.zig", .uses_uart = true }, + Test{ .name = "uart-sync", .source = "tests/uart-sync.zig", .uses_uart = true, .on_avr = false }, // Note: this example uses the systick interrupt and therefore only for arm microcontrollers - Test{ .name = "interrupt", .source = "tests/interrupt.zig" }, + Test{ .name = "interrupt", .source = "tests/interrupt.zig", .on_avr = false }, }; const filter = b.option(std.Target.Cpu.Arch, "filter-target", "Filters for a certain cpu target"); - inline for (all_backings) |cfg| { - inline for (all_tests) |tst| { + for (all_backings) |cfg| { + for (all_tests) |tst| { if (tst.uses_uart and !cfg.supports_uart_test) continue; + if ((cfg.backing.getTarget().cpu_arch.?) == .avr and tst.on_avr == false) continue; const exe = try microzig.addEmbeddedExecutable( b, - "test-" ++ tst.name ++ "-" ++ cfg.name ++ ".elf", + b.fmt("test-{s}-{s}.elf", .{ tst.name, cfg.name }), tst.source, cfg.backing, .{}, @@ -56,7 +57,7 @@ pub fn build(b: *std.build.Builder) !void { const bin = b.addInstallRaw( exe, - "test-" ++ tst.name ++ "-" ++ cfg.name ++ ".bin", + b.fmt("test-{s}-{s}.bin", .{ tst.name, cfg.name }), .{}, ); b.getInstallStep().dependOn(&bin.step); diff --git a/src/core/microzig.zig b/src/core/microzig.zig index d7805e6..4343a23 100644 --- a/src/core/microzig.zig +++ b/src/core/microzig.zig @@ -1,5 +1,6 @@ const std = @import("std"); const root = @import("root"); +const builtin = @import("builtin"); /// Contains build-time generated configuration options for microzig. /// Contains a CPU target description, chip, board and cpu information @@ -39,22 +40,24 @@ pub const debug = @import("debug.zig"); /// pub const panic = micro.panic; /// ``` pub fn panic(message: []const u8, maybe_stack_trace: ?*std.builtin.StackTrace) noreturn { + // utilize logging functions std.log.err("microzig PANIC: {s}", .{message}); - // then use the current debug channel - var writer = debug.writer(); - writer.print("microzig PANIC: {s}\r\n", .{message}) catch unreachable; - if (maybe_stack_trace) |stack_trace| { - var frame_index: usize = 0; - var frames_left: usize = std.math.min(stack_trace.index, stack_trace.instruction_addresses.len); - - while (frames_left != 0) : ({ - frames_left -= 1; - frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len; - }) { - const return_address = stack_trace.instruction_addresses[frame_index]; - writer.print("0x{X:0>8}\r\n", .{return_address}) catch unreachable; + if (builtin.cpu.arch != .avr) { + var writer = debug.writer(); + writer.print("microzig PANIC: {s}\r\n", .{message}) catch unreachable; + + if (maybe_stack_trace) |stack_trace| { + var frame_index: usize = 0; + var frames_left: usize = std.math.min(stack_trace.index, stack_trace.instruction_addresses.len); + while (frames_left != 0) : ({ + frames_left -= 1; + frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len; + }) { + const return_address = stack_trace.instruction_addresses[frame_index]; + writer.print("0x{X:0>8}\r\n", .{return_address}) catch unreachable; + } } } hang(); diff --git a/src/core/start.zig b/src/core/start.zig index c802b01..3414f48 100644 --- a/src/core/start.zig +++ b/src/core/start.zig @@ -1,5 +1,6 @@ const std = @import("std"); const app = @import("app"); +const builtin = @import("builtin"); const microzig = @import("microzig"); pub usingnamespace app; @@ -10,12 +11,23 @@ fn isValidField(field_name: []const u8) bool { !std.mem.eql(u8, field_name, "reset"); } +comptime { + if (builtin.cpu.arch == .arm or builtin.cpu.arch == .thumb) { + @export(vector_table, .{ + .name = "vector_table", + .section = "microzig_flash_start", + .linkage = .Strong, + }); + } +} + const VectorTable = microzig.chip.VectorTable; -export const vector_table: VectorTable linksection("microzig_flash_start") = blk: { +const vector_table: VectorTable = blk: { var tmp: microzig.chip.VectorTable = .{ .initial_stack_pointer = microzig.config.end_of_stack, .Reset = .{ .C = microzig.cpu.startup_logic._start }, }; + if (@hasDecl(app, "interrupts")) { if (@typeInfo(app.interrupts) != .Struct) @compileLog("root.interrupts must be a struct"); diff --git a/src/main.zig b/src/main.zig index 275ea18..9174abf 100644 --- a/src/main.zig +++ b/src/main.zig @@ -7,9 +7,17 @@ pub const cpus = @import("modules/cpus.zig"); pub const Board = @import("modules/Board.zig"); pub const Chip = @import("modules/Chip.zig"); pub const Cpu = @import("modules/Cpu.zig"); + pub const Backing = union(enum) { board: Board, chip: Chip, + + pub fn getTarget(self: @This()) std.zig.CrossTarget { + return switch (self) { + .board => |brd| brd.chip.cpu.target, + .chip => |chip| chip.cpu.target, + }; + } }; const Pkg = std.build.Pkg; @@ -133,7 +141,7 @@ pub fn addEmbeddedExecutable( // - Generate the linker scripts from the "chip" or "board" package instead of using hardcoded ones. // - This requires building another tool that runs on the host that compiles those files and emits the linker script. // - src/tools/linkerscript-gen.zig is the source file for this - exe.bundle_compiler_rt = true; + exe.bundle_compiler_rt = (exe.target.cpu_arch.? != .avr); // don't bundle compiler_rt for AVR as it doesn't compile right now switch (backing) { .chip => { var app_pkgs = std.ArrayList(Pkg).init(builder.allocator); diff --git a/src/modules/chips/atmega328p/atmega328p.zig b/src/modules/chips/atmega328p/atmega328p.zig index 1d6f83d..30b93c7 100644 --- a/src/modules/chips/atmega328p/atmega328p.zig +++ b/src/modules/chips/atmega328p/atmega328p.zig @@ -1,4 +1,5 @@ const std = @import("std"); +const micro = @import("microzig"); pub const cpu = @import("cpu"); const Port = enum(u8) { @@ -42,15 +43,15 @@ pub const gpio = struct { cpu.cbi(regs(pin).dir_addr, pin.pin); } - pub fn read(comptime pin: type) u1 { + pub fn read(comptime pin: type) micro.gpio.State { return if ((regs(pin).pin.* & (1 << pin.pin)) != 0) - @as(u1, 1) + .high else - 0; + .low; } - pub fn write(comptime pin: type, state: u1) void { - if (state == 1) { + pub fn write(comptime pin: type, state: micro.gpio.State) void { + if (state == .high) { cpu.sbi(regs(pin).port_addr, pin.pin); } else { cpu.cbi(regs(pin).port_addr, pin.pin); diff --git a/src/modules/chips/lpc1768/registers.zig b/src/modules/chips/lpc1768/registers.zig index b382030..12d3ba1 100644 --- a/src/modules/chips/lpc1768/registers.zig +++ b/src/modules/chips/lpc1768/registers.zig @@ -3,7 +3,7 @@ // device: LPC176x5x // cpu: CM3 -pub const VectorTable = struct { +pub const VectorTable = extern struct { initial_stack_pointer: u32, Reset: InterruptVector = unhandled, NMI: InterruptVector = unhandled, diff --git a/src/modules/chips/nrf52/registers.zig b/src/modules/chips/nrf52/registers.zig index ccde288..617e52f 100644 --- a/src/modules/chips/nrf52/registers.zig +++ b/src/modules/chips/nrf52/registers.zig @@ -4,7 +4,7 @@ // device: nrf52 // cpu: CM4 -pub const VectorTable = struct { +pub const VectorTable = extern struct { initial_stack_pointer: u32, Reset: InterruptVector = unhandled, NMI: InterruptVector = unhandled, @@ -124,7 +124,7 @@ pub const registers = struct { /// address: 0x10000000 /// Slope definition A0. - pub const A0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A0 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -151,7 +151,7 @@ pub const registers = struct { /// address: 0x10000004 /// Slope definition A1. - pub const A1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A1 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -178,7 +178,7 @@ pub const registers = struct { /// address: 0x10000008 /// Slope definition A2. - pub const A2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A2 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -205,7 +205,7 @@ pub const registers = struct { /// address: 0x1000000c /// Slope definition A3. - pub const A3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A3 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -232,7 +232,7 @@ pub const registers = struct { /// address: 0x10000010 /// Slope definition A4. - pub const A4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A4 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -259,7 +259,7 @@ pub const registers = struct { /// address: 0x10000014 /// Slope definition A5. - pub const A5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A5 = @intToPtr(*volatile Mmio(32, packed struct { /// A (slope definition) register. A: u12, padding0: u1, @@ -286,7 +286,7 @@ pub const registers = struct { /// address: 0x10000018 /// y-intercept B0. - pub const B0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B0 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -311,7 +311,7 @@ pub const registers = struct { /// address: 0x1000001c /// y-intercept B1. - pub const B1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B1 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -336,7 +336,7 @@ pub const registers = struct { /// address: 0x10000020 /// y-intercept B2. - pub const B2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B2 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -361,7 +361,7 @@ pub const registers = struct { /// address: 0x10000024 /// y-intercept B3. - pub const B3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B3 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -386,7 +386,7 @@ pub const registers = struct { /// address: 0x10000028 /// y-intercept B4. - pub const B4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B4 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -411,7 +411,7 @@ pub const registers = struct { /// address: 0x1000002c /// y-intercept B5. - pub const B5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B5 = @intToPtr(*volatile Mmio(32, packed struct { /// B (y-intercept) B: u14, padding0: u1, @@ -436,7 +436,7 @@ pub const registers = struct { /// address: 0x10000030 /// Segment end T0. - pub const T0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const T0 = @intToPtr(*volatile Mmio(32, packed struct { /// T (segment end)register. T: u8, padding0: u1, @@ -467,7 +467,7 @@ pub const registers = struct { /// address: 0x10000034 /// Segment end T1. - pub const T1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const T1 = @intToPtr(*volatile Mmio(32, packed struct { /// T (segment end)register. T: u8, padding0: u1, @@ -498,7 +498,7 @@ pub const registers = struct { /// address: 0x10000038 /// Segment end T2. - pub const T2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const T2 = @intToPtr(*volatile Mmio(32, packed struct { /// T (segment end)register. T: u8, padding0: u1, @@ -529,7 +529,7 @@ pub const registers = struct { /// address: 0x1000003c /// Segment end T3. - pub const T3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const T3 = @intToPtr(*volatile Mmio(32, packed struct { /// T (segment end)register. T: u8, padding0: u1, @@ -560,7 +560,7 @@ pub const registers = struct { /// address: 0x10000040 /// Segment end T4. - pub const T4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const T4 = @intToPtr(*volatile Mmio(32, packed struct { /// T (segment end)register. T: u8, padding0: u1, @@ -595,7 +595,7 @@ pub const registers = struct { /// address: 0x10000000 /// Default header for NFC Tag. Software can read these values to populate /// NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. - pub const TAGHEADER0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TAGHEADER0 = @intToPtr(*volatile Mmio(32, packed struct { /// Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F MFGID: u8, /// Unique identifier byte 1 @@ -609,7 +609,7 @@ pub const registers = struct { /// address: 0x10000004 /// Default header for NFC Tag. Software can read these values to populate /// NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. - pub const TAGHEADER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TAGHEADER1 = @intToPtr(*volatile Mmio(32, packed struct { /// Unique identifier byte 4 UD4: u8, /// Unique identifier byte 5 @@ -623,7 +623,7 @@ pub const registers = struct { /// address: 0x10000008 /// Default header for NFC Tag. Software can read these values to populate /// NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. - pub const TAGHEADER2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TAGHEADER2 = @intToPtr(*volatile Mmio(32, packed struct { /// Unique identifier byte 8 UD8: u8, /// Unique identifier byte 9 @@ -637,7 +637,7 @@ pub const registers = struct { /// address: 0x1000000c /// Default header for NFC Tag. Software can read these values to populate /// NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. - pub const TAGHEADER3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TAGHEADER3 = @intToPtr(*volatile Mmio(32, packed struct { /// Unique identifier byte 12 UD12: u8, /// Unique identifier byte 13 @@ -684,7 +684,7 @@ pub const registers = struct { /// address: 0x10001200 /// Description collection[0]: Mapping of the nRESET function (see POWER chapter for /// details) - pub const PSELRESET = @intToPtr(*volatile [2]Mmio(32, packed struct{ + pub const PSELRESET = @intToPtr(*volatile [2]Mmio(32, packed struct { /// GPIO number P0.n onto which Reset is exposed PIN: u6, reserved0: u1, @@ -718,7 +718,7 @@ pub const registers = struct { /// address: 0x10001208 /// Access Port protection - pub const APPROTECT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APPROTECT = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable Access Port protection. Any other value than 0xFF being /// written to this field will enable protection. PALL: u8, @@ -750,7 +750,7 @@ pub const registers = struct { /// address: 0x1000120c /// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO - pub const NFCPINS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NFCPINS = @intToPtr(*volatile Mmio(32, packed struct { /// Setting of pins dedicated to NFC functionality PROTECT: u1, padding0: u1, @@ -792,7 +792,7 @@ pub const registers = struct { /// address: 0x40000600 /// Block protect configuration register 0 - pub const CONFIG0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG0 = @intToPtr(*volatile Mmio(32, packed struct { /// Enable protection for region 0. Write '0' has no effect. REGION0: u1, /// Enable protection for region 1. Write '0' has no effect. @@ -861,7 +861,7 @@ pub const registers = struct { /// address: 0x40000604 /// Block protect configuration register 1 - pub const CONFIG1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG1 = @intToPtr(*volatile Mmio(32, packed struct { /// Enable protection for region 32. Write '0' has no effect. REGION32: u1, /// Enable protection for region 33. Write '0' has no effect. @@ -938,7 +938,7 @@ pub const registers = struct { /// address: 0x40000610 /// Block protect configuration register 2 - pub const CONFIG2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG2 = @intToPtr(*volatile Mmio(32, packed struct { /// Enable protection for region 64. Write '0' has no effect. REGION64: u1, /// Enable protection for region 65. Write '0' has no effect. @@ -1007,7 +1007,7 @@ pub const registers = struct { /// address: 0x40000614 /// Block protect configuration register 3 - pub const CONFIG3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG3 = @intToPtr(*volatile Mmio(32, packed struct { /// Enable protection for region 96. Write '0' has no effect. REGION96: u1, /// Enable protection for region 97. Write '0' has no effect. @@ -1100,7 +1100,7 @@ pub const registers = struct { /// address: 0x40000304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Enable interrupt for POFWARN event @@ -1140,7 +1140,7 @@ pub const registers = struct { /// address: 0x40000308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Disable interrupt for POFWARN event @@ -1180,7 +1180,7 @@ pub const registers = struct { /// address: 0x40000400 /// Reset reason - pub const RESETREAS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESETREAS = @intToPtr(*volatile Mmio(32, packed struct { /// Reset from pin-reset detected RESETPIN: u1, /// Reset from watchdog detected @@ -1228,7 +1228,7 @@ pub const registers = struct { /// address: 0x40000428 /// Deprecated register - RAM status register - pub const RAMSTATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RAMSTATUS = @intToPtr(*volatile Mmio(32, packed struct { /// RAM block 0 is on or off/powering up RAMBLOCK0: u1, /// RAM block 1 is on or off/powering up @@ -1273,7 +1273,7 @@ pub const registers = struct { /// address: 0x40000510 /// Power failure comparator configuration - pub const POFCON = @intToPtr(*volatile Mmio(32, packed struct{ + pub const POFCON = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable power failure comparator POF: u1, /// Power failure comparator threshold setting @@ -1313,7 +1313,7 @@ pub const registers = struct { /// address: 0x40000520 /// General purpose retention register - pub const GPREGRET2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GPREGRET2 = @intToPtr(*volatile Mmio(32, packed struct { /// General purpose retention register GPREGRET: u8, padding0: u1, @@ -1344,7 +1344,7 @@ pub const registers = struct { /// address: 0x40000524 /// Deprecated register - RAM on/off register (this register is retained) - pub const RAMON = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RAMON = @intToPtr(*volatile Mmio(32, packed struct { /// Keep RAM block 0 on or off in system ON Mode ONRAM0: u1, /// Keep RAM block 1 on or off in system ON Mode @@ -1385,7 +1385,7 @@ pub const registers = struct { /// address: 0x40000554 /// Deprecated register - RAM on/off register (this register is retained) - pub const RAMONB = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RAMONB = @intToPtr(*volatile Mmio(32, packed struct { /// Keep RAM block 2 on or off in system ON Mode ONRAM2: u1, /// Keep RAM block 3 on or off in system ON Mode @@ -1430,7 +1430,7 @@ pub const registers = struct { pub const RAM = @ptrCast(*volatile [8]packed struct { /// Description cluster[0]: RAM0 power control register - POWER: Mmio(32, packed struct{ + POWER: Mmio(32, packed struct { /// Keep RAM section S0 ON or OFF in System ON mode. S0POWER: u1, /// Keep RAM section S1 ON or OFF in System ON mode. @@ -1470,7 +1470,7 @@ pub const registers = struct { }), /// Description cluster[0]: RAM0 power control set register - POWERSET: Mmio(32, packed struct{ + POWERSET: Mmio(32, packed struct { /// Keep RAM section S0 of RAM0 on or off in System ON mode S0POWER: u1, /// Keep RAM section S1 of RAM0 on or off in System ON mode @@ -1510,7 +1510,7 @@ pub const registers = struct { }), /// Description cluster[0]: RAM0 power control clear register - POWERCLR: Mmio(32, packed struct{ + POWERCLR: Mmio(32, packed struct { /// Keep RAM section S0 of RAM0 on or off in System ON mode S0POWER: u1, /// Keep RAM section S1 of RAM0 on or off in System ON mode @@ -1601,7 +1601,7 @@ pub const registers = struct { /// address: 0x40000304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for HFCLKSTARTED event HFCLKSTARTED: u1, /// Write '1' to Enable interrupt for LFCLKSTARTED event @@ -1642,7 +1642,7 @@ pub const registers = struct { /// address: 0x40000308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for HFCLKSTARTED event HFCLKSTARTED: u1, /// Write '1' to Disable interrupt for LFCLKSTARTED event @@ -1683,7 +1683,7 @@ pub const registers = struct { /// address: 0x40000408 /// Status indicating that HFCLKSTART task has been triggered - pub const HFCLKRUN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HFCLKRUN = @intToPtr(*volatile Mmio(32, packed struct { /// HFCLKSTART task triggered or not STATUS: u1, padding0: u1, @@ -1721,7 +1721,7 @@ pub const registers = struct { /// address: 0x4000040c /// HFCLK status - pub const HFCLKSTAT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HFCLKSTAT = @intToPtr(*volatile Mmio(32, packed struct { /// Source of HFCLK SRC: u1, reserved0: u1, @@ -1760,7 +1760,7 @@ pub const registers = struct { /// address: 0x40000414 /// Status indicating that LFCLKSTART task has been triggered - pub const LFCLKRUN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LFCLKRUN = @intToPtr(*volatile Mmio(32, packed struct { /// LFCLKSTART task triggered or not STATUS: u1, padding0: u1, @@ -1798,7 +1798,7 @@ pub const registers = struct { /// address: 0x40000418 /// LFCLK status - pub const LFCLKSTAT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LFCLKSTAT = @intToPtr(*volatile Mmio(32, packed struct { /// Source of LFCLK SRC: u2, reserved0: u1, @@ -1836,7 +1836,7 @@ pub const registers = struct { /// address: 0x4000041c /// Copy of LFCLKSRC register, set when LFCLKSTART task was triggered - pub const LFCLKSRCCOPY = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LFCLKSRCCOPY = @intToPtr(*volatile Mmio(32, packed struct { /// Clock source SRC: u2, padding0: u1, @@ -1873,7 +1873,7 @@ pub const registers = struct { /// address: 0x40000518 /// Clock source for the LFCLK - pub const LFCLKSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LFCLKSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Clock source SRC: u2, reserved0: u1, @@ -1916,7 +1916,7 @@ pub const registers = struct { /// address: 0x4000055c /// Clocking options for the Trace Port debug interface - pub const TRACECONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TRACECONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Speed of Trace Port clock. Note that the TRACECLK pin will output this clock /// divided by two. TRACEPORTSPEED: u2, @@ -2038,7 +2038,7 @@ pub const registers = struct { /// address: 0x40001200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between READY event and START task READY_START: u1, /// Shortcut between END event and DISABLE task @@ -2083,7 +2083,7 @@ pub const registers = struct { /// address: 0x40001304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for READY event READY: u1, /// Write '1' to Enable interrupt for ADDRESS event @@ -2131,7 +2131,7 @@ pub const registers = struct { /// address: 0x40001308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for READY event READY: u1, /// Write '1' to Disable interrupt for ADDRESS event @@ -2199,7 +2199,7 @@ pub const registers = struct { /// address: 0x40001508 /// Frequency - pub const FREQUENCY = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FREQUENCY = @intToPtr(*volatile Mmio(32, packed struct { /// Radio channel frequency FREQUENCY: u7, reserved0: u1, @@ -2240,7 +2240,7 @@ pub const registers = struct { /// address: 0x40001514 /// Packet configuration register 0 - pub const PCNF0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCNF0 = @intToPtr(*volatile Mmio(32, packed struct { /// Length on air of LENGTH field in number of bits. LFLEN: u4, reserved0: u1, @@ -2276,7 +2276,7 @@ pub const registers = struct { /// address: 0x40001518 /// Packet configuration register 1 - pub const PCNF1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCNF1 = @intToPtr(*volatile Mmio(32, packed struct { /// Maximum length of packet payload. If the packet payload is larger than MAXLEN, /// the radio will truncate the payload to MAXLEN. MAXLEN: u8, @@ -2312,7 +2312,7 @@ pub const registers = struct { /// address: 0x40001524 /// Prefixes bytes for logical addresses 0-3 - pub const PREFIX0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PREFIX0 = @intToPtr(*volatile Mmio(32, packed struct { /// Address prefix 0. AP0: u8, /// Address prefix 1. @@ -2325,7 +2325,7 @@ pub const registers = struct { /// address: 0x40001528 /// Prefixes bytes for logical addresses 4-7 - pub const PREFIX1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PREFIX1 = @intToPtr(*volatile Mmio(32, packed struct { /// Address prefix 4. AP4: u8, /// Address prefix 5. @@ -2342,7 +2342,7 @@ pub const registers = struct { /// address: 0x40001530 /// Receive address select - pub const RXADDRESSES = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXADDRESSES = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable reception on logical address 0. ADDR0: u1, /// Enable or disable reception on logical address 1. @@ -2387,7 +2387,7 @@ pub const registers = struct { /// address: 0x40001534 /// CRC configuration - pub const CRCCNF = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCCNF = @intToPtr(*volatile Mmio(32, packed struct { /// CRC length in number of bytes. LEN: u2, reserved0: u1, @@ -2465,7 +2465,7 @@ pub const registers = struct { /// address: 0x40001640 /// Device address match configuration - pub const DACNF = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DACNF = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable device address matching using device address 0 ENA0: u1, /// Enable or disable device address matching using device address 1 @@ -2518,7 +2518,7 @@ pub const registers = struct { /// address: 0x40001650 /// Radio mode configuration register 0 - pub const MODECNF0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODECNF0 = @intToPtr(*volatile Mmio(32, packed struct { /// Radio ramp-up time RU: u1, reserved0: u1, @@ -2628,7 +2628,7 @@ pub const registers = struct { /// address: 0x40002200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -2667,7 +2667,7 @@ pub const registers = struct { /// address: 0x40002300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for CTS event CTS: u1, /// Enable or disable interrupt for NCTS event @@ -2715,7 +2715,7 @@ pub const registers = struct { /// address: 0x40002304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for CTS event CTS: u1, /// Write '1' to Enable interrupt for NCTS event @@ -2763,7 +2763,7 @@ pub const registers = struct { /// address: 0x40002308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for CTS event CTS: u1, /// Write '1' to Disable interrupt for NCTS event @@ -2811,7 +2811,7 @@ pub const registers = struct { /// address: 0x40002480 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// Parity error @@ -2860,7 +2860,7 @@ pub const registers = struct { /// address: 0x4000256c /// Configuration of parity and hardware flow control - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Hardware flow control HWFC: u1, /// Parity @@ -2899,7 +2899,7 @@ pub const registers = struct { /// address: 0x40002000 /// Pin select for RTS signal - pub const RTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTS = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -2934,7 +2934,7 @@ pub const registers = struct { /// address: 0x40002004 /// Pin select for TXD signal - pub const TXD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXD = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -2969,7 +2969,7 @@ pub const registers = struct { /// address: 0x40002008 /// Pin select for CTS signal - pub const CTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CTS = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3004,7 +3004,7 @@ pub const registers = struct { /// address: 0x4000200c /// Pin select for RXD signal - pub const RXD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXD = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3120,7 +3120,7 @@ pub const registers = struct { /// address: 0x40002200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -3159,7 +3159,7 @@ pub const registers = struct { /// address: 0x40002304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for CTS event CTS: u1, /// Write '1' to Enable interrupt for NCTS event @@ -3202,7 +3202,7 @@ pub const registers = struct { /// address: 0x40002308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for CTS event CTS: u1, /// Write '1' to Disable interrupt for NCTS event @@ -3245,7 +3245,7 @@ pub const registers = struct { /// address: 0x40002480 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// Parity error @@ -3318,7 +3318,7 @@ pub const registers = struct { /// address: 0x4000256c /// Configuration of parity and hardware flow control - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Hardware flow control HWFC: u1, /// Parity @@ -3395,7 +3395,7 @@ pub const registers = struct { /// address: 0x40003200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -3433,7 +3433,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -3475,7 +3475,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -3525,7 +3525,7 @@ pub const registers = struct { /// address: 0x40003554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -3572,7 +3572,7 @@ pub const registers = struct { /// address: 0x40003000 /// Pin select for SCK - pub const SCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3607,7 +3607,7 @@ pub const registers = struct { /// address: 0x40003004 /// Pin select for MOSI signal - pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3642,7 +3642,7 @@ pub const registers = struct { /// address: 0x40003008 /// Pin select for MISO signal - pub const MISO = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MISO = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3742,7 +3742,7 @@ pub const registers = struct { /// address: 0x40003200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Shortcut between END event and ACQUIRE task @@ -3780,7 +3780,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for END event END: u1, @@ -3820,7 +3820,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for END event END: u1, @@ -3864,7 +3864,7 @@ pub const registers = struct { /// address: 0x40003440 /// Status from last transaction - pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct { /// TX buffer over-read detected, and prevented OVERREAD: u1, /// RX buffer overflow detected, and prevented @@ -3907,7 +3907,7 @@ pub const registers = struct { /// address: 0x40003554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -3957,7 +3957,7 @@ pub const registers = struct { /// address: 0x40003000 /// Pin select for SCK - pub const SCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -3992,7 +3992,7 @@ pub const registers = struct { /// address: 0x40003004 /// Pin select for MISO signal - pub const MISO = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MISO = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4027,7 +4027,7 @@ pub const registers = struct { /// address: 0x40003008 /// Pin select for MOSI signal - pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4062,7 +4062,7 @@ pub const registers = struct { /// address: 0x4000300c /// Pin select for CSN signal - pub const CSN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSN = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4181,7 +4181,7 @@ pub const registers = struct { /// address: 0x40003200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -4223,7 +4223,7 @@ pub const registers = struct { /// address: 0x40003300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -4267,7 +4267,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -4311,7 +4311,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -4355,7 +4355,7 @@ pub const registers = struct { /// address: 0x400034c4 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// NACK received after sending the address (write '1' to clear) @@ -4409,7 +4409,7 @@ pub const registers = struct { /// address: 0x40003000 /// Pin select for SCL signal - pub const SCL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCL = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4444,7 +4444,7 @@ pub const registers = struct { /// address: 0x40003004 /// Pin select for SDA signal - pub const SDA = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SDA = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4568,7 +4568,7 @@ pub const registers = struct { /// address: 0x40003200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -4607,7 +4607,7 @@ pub const registers = struct { /// address: 0x40003300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -4650,7 +4650,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -4693,7 +4693,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -4736,7 +4736,7 @@ pub const registers = struct { /// address: 0x400034d0 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// RX buffer overflow detected, and prevented OVERFLOW: u1, reserved0: u1, @@ -4788,7 +4788,7 @@ pub const registers = struct { /// address: 0x40003594 /// Configuration register for the address match mechanism - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable address matching on ADDRESS[0] ADDRESS0: u1, /// Enable or disable address matching on ADDRESS[1] @@ -4834,7 +4834,7 @@ pub const registers = struct { /// address: 0x40003000 /// Pin select for SCL signal - pub const SCL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCL = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4869,7 +4869,7 @@ pub const registers = struct { /// address: 0x40003004 /// Pin select for SDA signal - pub const SDA = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SDA = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -4945,7 +4945,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Enable interrupt for READY event @@ -4983,7 +4983,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Disable interrupt for READY event @@ -5037,7 +5037,7 @@ pub const registers = struct { /// address: 0x40003554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -5079,21 +5079,21 @@ pub const registers = struct { /// address: 0x40003000 /// Pin select for SCK - pub const SCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number configuration for SPI SCK signal PSELSCK: u32, }), base_address + 0x0); /// address: 0x40003004 /// Pin select for MOSI - pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MOSI = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number configuration for SPI MOSI signal PSELMOSI: u32, }), base_address + 0x4); /// address: 0x40003008 /// Pin select for MISO - pub const MISO = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MISO = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number configuration for SPI MISO signal PSELMISO: u32, }), base_address + 0x8); @@ -5149,7 +5149,7 @@ pub const registers = struct { /// address: 0x40003200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between BB event and SUSPEND task BB_SUSPEND: u1, /// Shortcut between BB event and STOP task @@ -5188,7 +5188,7 @@ pub const registers = struct { /// address: 0x40003304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -5231,7 +5231,7 @@ pub const registers = struct { /// address: 0x40003308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -5274,7 +5274,7 @@ pub const registers = struct { /// address: 0x400034c4 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// NACK received after sending the address (write '1' to clear) @@ -5382,7 +5382,7 @@ pub const registers = struct { /// address: 0x40004200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -5420,7 +5420,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -5462,7 +5462,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -5512,7 +5512,7 @@ pub const registers = struct { /// address: 0x40004554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -5581,7 +5581,7 @@ pub const registers = struct { /// address: 0x40004200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Shortcut between END event and ACQUIRE task @@ -5619,7 +5619,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for END event END: u1, @@ -5659,7 +5659,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for END event END: u1, @@ -5703,7 +5703,7 @@ pub const registers = struct { /// address: 0x40004440 /// Status from last transaction - pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct { /// TX buffer over-read detected, and prevented OVERREAD: u1, /// RX buffer overflow detected, and prevented @@ -5746,7 +5746,7 @@ pub const registers = struct { /// address: 0x40004554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -5847,7 +5847,7 @@ pub const registers = struct { /// address: 0x40004200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -5889,7 +5889,7 @@ pub const registers = struct { /// address: 0x40004300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -5933,7 +5933,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -5977,7 +5977,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -6021,7 +6021,7 @@ pub const registers = struct { /// address: 0x400044c4 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// NACK received after sending the address (write '1' to clear) @@ -6121,7 +6121,7 @@ pub const registers = struct { /// address: 0x40004200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -6160,7 +6160,7 @@ pub const registers = struct { /// address: 0x40004300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -6203,7 +6203,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -6246,7 +6246,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -6289,7 +6289,7 @@ pub const registers = struct { /// address: 0x400044d0 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// RX buffer overflow detected, and prevented OVERFLOW: u1, reserved0: u1, @@ -6341,7 +6341,7 @@ pub const registers = struct { /// address: 0x40004594 /// Configuration register for the address match mechanism - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable address matching on ADDRESS[0] ADDRESS0: u1, /// Enable or disable address matching on ADDRESS[1] @@ -6393,7 +6393,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Enable interrupt for READY event @@ -6431,7 +6431,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Disable interrupt for READY event @@ -6485,7 +6485,7 @@ pub const registers = struct { /// address: 0x40004554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -6573,7 +6573,7 @@ pub const registers = struct { /// address: 0x40004200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between BB event and SUSPEND task BB_SUSPEND: u1, /// Shortcut between BB event and STOP task @@ -6612,7 +6612,7 @@ pub const registers = struct { /// address: 0x40004304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -6655,7 +6655,7 @@ pub const registers = struct { /// address: 0x40004308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -6698,7 +6698,7 @@ pub const registers = struct { /// address: 0x400044c4 /// Error source - pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSRC = @intToPtr(*volatile Mmio(32, packed struct { /// Overrun error OVERRUN: u1, /// NACK received after sending the address (write '1' to clear) @@ -6863,7 +6863,7 @@ pub const registers = struct { /// address: 0x40005200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between FIELDDETECTED event and ACTIVATE task FIELDDETECTED_ACTIVATE: u1, /// Shortcut between FIELDLOST event and SENSE task @@ -6902,7 +6902,7 @@ pub const registers = struct { /// address: 0x40005300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for READY event READY: u1, /// Enable or disable interrupt for FIELDDETECTED event @@ -6954,7 +6954,7 @@ pub const registers = struct { /// address: 0x40005304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for READY event READY: u1, /// Write '1' to Enable interrupt for FIELDDETECTED event @@ -7006,7 +7006,7 @@ pub const registers = struct { /// address: 0x40005308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for READY event READY: u1, /// Write '1' to Disable interrupt for FIELDDETECTED event @@ -7058,7 +7058,7 @@ pub const registers = struct { /// address: 0x40005404 /// NFC Error Status register - pub const ERRORSTATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ERRORSTATUS = @intToPtr(*volatile Mmio(32, packed struct { /// No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX FRAMEDELAYTIMEOUT: u1, reserved0: u1, @@ -7102,7 +7102,7 @@ pub const registers = struct { /// address: 0x4000543c /// Indicates the presence or not of a valid field - pub const FIELDPRESENT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FIELDPRESENT = @intToPtr(*volatile Mmio(32, packed struct { /// Indicates the presence or not of a valid field. Available only in the activated /// state. FIELDPRESENT: u1, @@ -7154,7 +7154,7 @@ pub const registers = struct { /// address: 0x40005510 /// Packet pointer for TXD and RXD data storage in Data RAM - pub const PACKETPTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PACKETPTR = @intToPtr(*volatile Mmio(32, packed struct { /// Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte /// aligned RAM address. PTR: u32, @@ -7166,7 +7166,7 @@ pub const registers = struct { /// address: 0x40005590 /// Last NFCID1 part (4, 7 or 10 bytes ID) - pub const NFCID1_LAST = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NFCID1_LAST = @intToPtr(*volatile Mmio(32, packed struct { /// NFCID1 byte Z (very last byte sent) NFCID1_Z: u8, /// NFCID1 byte Y @@ -7179,7 +7179,7 @@ pub const registers = struct { /// address: 0x40005594 /// Second last NFCID1 part (7 or 10 bytes ID) - pub const NFCID1_2ND_LAST = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NFCID1_2ND_LAST = @intToPtr(*volatile Mmio(32, packed struct { /// NFCID1 byte V NFCID1_V: u8, /// NFCID1 byte U @@ -7198,7 +7198,7 @@ pub const registers = struct { /// address: 0x40005598 /// Third last NFCID1 part (10 bytes ID) - pub const NFCID1_3RD_LAST = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NFCID1_3RD_LAST = @intToPtr(*volatile Mmio(32, packed struct { /// NFCID1 byte S NFCID1_S: u8, /// NFCID1 byte R @@ -7217,7 +7217,7 @@ pub const registers = struct { /// address: 0x400055a0 /// NFC-A SENS_RES auto-response settings - pub const SENSRES = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SENSRES = @intToPtr(*volatile Mmio(32, packed struct { /// Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC /// Forum, NFC Digital Protocol Technical Specification BITFRAMESDD: u5, @@ -7250,7 +7250,7 @@ pub const registers = struct { /// address: 0x400055a4 /// NFC-A SEL_RES auto-response settings - pub const SELRES = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SELRES = @intToPtr(*volatile Mmio(32, packed struct { /// Reserved for future use. Shall be 0. RFU10: u2, /// Cascade bit (controlled by hardware, write has no effect) @@ -7292,7 +7292,7 @@ pub const registers = struct { /// address: 0x40005000 /// Result of last incoming frames - pub const RX = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RX = @intToPtr(*volatile Mmio(32, packed struct { /// No valid End of Frame detected CRCERROR: u1, reserved0: u1, @@ -7335,7 +7335,7 @@ pub const registers = struct { /// address: 0x40005000 /// Configuration of outgoing frames - pub const FRAMECONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FRAMECONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Adding parity or not in the frame PARITY: u1, /// Discarding unused bits in start or at end of a Frame @@ -7376,7 +7376,7 @@ pub const registers = struct { /// address: 0x40005004 /// Size of outgoing frame - pub const AMOUNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AMOUNT = @intToPtr(*volatile Mmio(32, packed struct { /// Number of bits in the last or first byte read from RAM that shall be included in /// the frame (excluding parity bit). TXDATABITS: u3, @@ -7410,7 +7410,7 @@ pub const registers = struct { /// address: 0x40005000 /// Configuration of incoming frames - pub const FRAMECONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FRAMECONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Parity expected or not in RX frame PARITY: u1, reserved0: u1, @@ -7450,7 +7450,7 @@ pub const registers = struct { /// address: 0x40005004 /// Size of last incoming frame - pub const AMOUNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AMOUNT = @intToPtr(*volatile Mmio(32, packed struct { /// Number of bits in the last byte in the frame, if less than 8 (including CRC, but /// excluding parity and SoF/EoF framing). RXDATABITS: u3, @@ -7509,7 +7509,7 @@ pub const registers = struct { /// address: 0x40006304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for IN[0] event IN0: u1, /// Write '1' to Enable interrupt for IN[1] event @@ -7555,7 +7555,7 @@ pub const registers = struct { /// address: 0x40006308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for IN[0] event IN0: u1, /// Write '1' to Disable interrupt for IN[1] event @@ -7602,7 +7602,7 @@ pub const registers = struct { /// address: 0x40006510 /// Description collection[0]: Configuration for OUT[n], SET[n] and CLR[n] tasks and /// IN[n] event - pub const CONFIG = @intToPtr(*volatile [8]Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile [8]Mmio(32, packed struct { /// Mode MODE: u2, reserved0: u1, @@ -7685,7 +7685,7 @@ pub const registers = struct { /// address: 0x40007300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for STARTED event STARTED: u1, /// Enable or disable interrupt for END event @@ -7744,7 +7744,7 @@ pub const registers = struct { /// address: 0x40007304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for STARTED event STARTED: u1, /// Write '1' to Enable interrupt for END event @@ -7803,7 +7803,7 @@ pub const registers = struct { /// address: 0x40007308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for STARTED event STARTED: u1, /// Write '1' to Disable interrupt for END event @@ -7870,7 +7870,7 @@ pub const registers = struct { /// address: 0x400075f0 /// Resolution configuration - pub const RESOLUTION = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESOLUTION = @intToPtr(*volatile Mmio(32, packed struct { /// Set the resolution VAL: u3, padding0: u1, @@ -7912,7 +7912,7 @@ pub const registers = struct { /// address: 0x400075f8 /// Controls normal or continuous sample rate - pub const SAMPLERATE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SAMPLERATE = @intToPtr(*volatile Mmio(32, packed struct { /// Capture and compare value. Sample rate is 16 MHz/CC CC: u11, reserved0: u1, @@ -7955,7 +7955,7 @@ pub const registers = struct { PSELN: MmioInt(32, u5), /// Description cluster[0]: Input configuration for CH[0] - CONFIG: Mmio(32, packed struct{ + CONFIG: Mmio(32, packed struct { /// Positive channel resistor control RESP: u2, reserved0: u1, @@ -7992,7 +7992,7 @@ pub const registers = struct { }), /// Description cluster[0]: High/low limits for event monitoring a channel - LIMIT: Mmio(32, packed struct{ + LIMIT: Mmio(32, packed struct { /// Low level limit LOW: u16, /// High level limit @@ -8050,7 +8050,7 @@ pub const registers = struct { /// address: 0x40008200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between COMPARE[0] event and CLEAR task COMPARE0_CLEAR: u1, /// Shortcut between COMPARE[1] event and CLEAR task @@ -8099,7 +8099,7 @@ pub const registers = struct { /// address: 0x40008304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8142,7 +8142,7 @@ pub const registers = struct { /// address: 0x40008308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8233,7 +8233,7 @@ pub const registers = struct { /// address: 0x40009200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between COMPARE[0] event and CLEAR task COMPARE0_CLEAR: u1, /// Shortcut between COMPARE[1] event and CLEAR task @@ -8282,7 +8282,7 @@ pub const registers = struct { /// address: 0x40009304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8325,7 +8325,7 @@ pub const registers = struct { /// address: 0x40009308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8416,7 +8416,7 @@ pub const registers = struct { /// address: 0x4000a200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between COMPARE[0] event and CLEAR task COMPARE0_CLEAR: u1, /// Shortcut between COMPARE[1] event and CLEAR task @@ -8465,7 +8465,7 @@ pub const registers = struct { /// address: 0x4000a304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8508,7 +8508,7 @@ pub const registers = struct { /// address: 0x4000a308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8599,7 +8599,7 @@ pub const registers = struct { /// address: 0x4000b304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TICK event TICK: u1, /// Write '1' to Enable interrupt for OVRFLW event @@ -8642,7 +8642,7 @@ pub const registers = struct { /// address: 0x4000b308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TICK event TICK: u1, /// Write '1' to Disable interrupt for OVRFLW event @@ -8685,7 +8685,7 @@ pub const registers = struct { /// address: 0x4000b340 /// Enable or disable event routing - pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable event routing for TICK event TICK: u1, /// Enable or disable event routing for OVRFLW event @@ -8728,7 +8728,7 @@ pub const registers = struct { /// address: 0x4000b344 /// Enable event routing - pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable event routing for TICK event TICK: u1, /// Write '1' to Enable event routing for OVRFLW event @@ -8771,7 +8771,7 @@ pub const registers = struct { /// address: 0x4000b348 /// Disable event routing - pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable event routing for TICK event TICK: u1, /// Write '1' to Disable event routing for OVRFLW event @@ -8823,7 +8823,7 @@ pub const registers = struct { /// address: 0x4000b540 /// Description collection[0]: Compare register 0 - pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct{ + pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct { /// Compare value COMPARE: u24, padding0: u1, @@ -8854,7 +8854,7 @@ pub const registers = struct { /// address: 0x4000c304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for DATARDY event DATARDY: u1, padding0: u1, @@ -8892,7 +8892,7 @@ pub const registers = struct { /// address: 0x4000c308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for DATARDY event DATARDY: u1, padding0: u1, @@ -9018,7 +9018,7 @@ pub const registers = struct { /// address: 0x4000d200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between VALRDY event and STOP task VALRDY_STOP: u1, padding0: u1, @@ -9056,7 +9056,7 @@ pub const registers = struct { /// address: 0x4000d304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for VALRDY event VALRDY: u1, padding0: u1, @@ -9094,7 +9094,7 @@ pub const registers = struct { /// address: 0x4000d308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for VALRDY event VALRDY: u1, padding0: u1, @@ -9132,7 +9132,7 @@ pub const registers = struct { /// address: 0x4000d504 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bias correction DERCEN: u1, padding0: u1, @@ -9194,7 +9194,7 @@ pub const registers = struct { /// address: 0x4000e304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for ENDECB event ENDECB: u1, /// Write '1' to Enable interrupt for ERRORECB event @@ -9233,7 +9233,7 @@ pub const registers = struct { /// address: 0x4000e308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for ENDECB event ENDECB: u1, /// Write '1' to Disable interrupt for ERRORECB event @@ -9305,7 +9305,7 @@ pub const registers = struct { /// address: 0x4000f200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between ENDKSGEN event and CRYPT task ENDKSGEN_CRYPT: u1, padding0: u1, @@ -9343,7 +9343,7 @@ pub const registers = struct { /// address: 0x4000f304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for ENDKSGEN event ENDKSGEN: u1, /// Write '1' to Enable interrupt for ENDCRYPT event @@ -9383,7 +9383,7 @@ pub const registers = struct { /// address: 0x4000f308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for ENDKSGEN event ENDKSGEN: u1, /// Write '1' to Disable interrupt for ENDCRYPT event @@ -9431,7 +9431,7 @@ pub const registers = struct { /// address: 0x4000f504 /// Operation mode - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// The mode of operation to be used MODE: u1, reserved0: u1, @@ -9511,7 +9511,7 @@ pub const registers = struct { /// address: 0x4000f304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for END event END: u1, /// Write '1' to Enable interrupt for RESOLVED event @@ -9551,7 +9551,7 @@ pub const registers = struct { /// address: 0x4000f308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for END event END: u1, /// Write '1' to Disable interrupt for RESOLVED event @@ -9627,7 +9627,7 @@ pub const registers = struct { /// address: 0x40010304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TIMEOUT event TIMEOUT: u1, padding0: u1, @@ -9665,7 +9665,7 @@ pub const registers = struct { /// address: 0x40010308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TIMEOUT event TIMEOUT: u1, padding0: u1, @@ -9707,7 +9707,7 @@ pub const registers = struct { /// address: 0x40010404 /// Request status - pub const REQSTATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const REQSTATUS = @intToPtr(*volatile Mmio(32, packed struct { /// Request status for RR[0] register RR0: u1, /// Request status for RR[1] register @@ -9756,7 +9756,7 @@ pub const registers = struct { /// address: 0x40010508 /// Enable register for reload request registers - pub const RREN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RREN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable RR[0] register RR0: u1, /// Enable or disable RR[1] register @@ -9801,7 +9801,7 @@ pub const registers = struct { /// address: 0x4001050c /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Configure the watchdog to either be paused, or kept running, while the CPU is /// sleeping SLEEP: u1, @@ -9878,7 +9878,7 @@ pub const registers = struct { /// address: 0x40011304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TICK event TICK: u1, /// Write '1' to Enable interrupt for OVRFLW event @@ -9921,7 +9921,7 @@ pub const registers = struct { /// address: 0x40011308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TICK event TICK: u1, /// Write '1' to Disable interrupt for OVRFLW event @@ -9964,7 +9964,7 @@ pub const registers = struct { /// address: 0x40011340 /// Enable or disable event routing - pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable event routing for TICK event TICK: u1, /// Enable or disable event routing for OVRFLW event @@ -10007,7 +10007,7 @@ pub const registers = struct { /// address: 0x40011344 /// Enable event routing - pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable event routing for TICK event TICK: u1, /// Write '1' to Enable event routing for OVRFLW event @@ -10050,7 +10050,7 @@ pub const registers = struct { /// address: 0x40011348 /// Disable event routing - pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable event routing for TICK event TICK: u1, /// Write '1' to Disable event routing for OVRFLW event @@ -10102,7 +10102,7 @@ pub const registers = struct { /// address: 0x40011540 /// Description collection[0]: Compare register 0 - pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct{ + pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct { /// Compare value COMPARE: u24, padding0: u1, @@ -10161,7 +10161,7 @@ pub const registers = struct { /// address: 0x40012200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between REPORTRDY event and READCLRACC task REPORTRDY_READCLRACC: u1, /// Shortcut between SAMPLERDY event and STOP task @@ -10205,7 +10205,7 @@ pub const registers = struct { /// address: 0x40012304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for SAMPLERDY event SAMPLERDY: u1, /// Write '1' to Enable interrupt for REPORTRDY event @@ -10247,7 +10247,7 @@ pub const registers = struct { /// address: 0x40012308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for SAMPLERDY event SAMPLERDY: u1, /// Write '1' to Disable interrupt for REPORTRDY event @@ -10336,7 +10336,7 @@ pub const registers = struct { /// address: 0x40012000 /// Pin select for LED signal - pub const LED = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LED = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -10371,7 +10371,7 @@ pub const registers = struct { /// address: 0x40012004 /// Pin select for A signal - pub const A = @intToPtr(*volatile Mmio(32, packed struct{ + pub const A = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -10406,7 +10406,7 @@ pub const registers = struct { /// address: 0x40012008 /// Pin select for B signal - pub const B = @intToPtr(*volatile Mmio(32, packed struct{ + pub const B = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -10474,7 +10474,7 @@ pub const registers = struct { /// address: 0x40013200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between READY event and SAMPLE task READY_SAMPLE: u1, /// Shortcut between READY event and STOP task @@ -10516,7 +10516,7 @@ pub const registers = struct { /// address: 0x40013300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for READY event READY: u1, /// Enable or disable interrupt for DOWN event @@ -10557,7 +10557,7 @@ pub const registers = struct { /// address: 0x40013304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for READY event READY: u1, /// Write '1' to Enable interrupt for DOWN event @@ -10598,7 +10598,7 @@ pub const registers = struct { /// address: 0x40013308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for READY event READY: u1, /// Write '1' to Disable interrupt for DOWN event @@ -10659,7 +10659,7 @@ pub const registers = struct { /// address: 0x40013530 /// Threshold configuration for hysteresis unit - pub const TH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TH = @intToPtr(*volatile Mmio(32, packed struct { /// VDOWN = (THDOWN+1)/64*VREF THDOWN: u6, reserved0: u1, @@ -10688,7 +10688,7 @@ pub const registers = struct { /// address: 0x40013534 /// Mode configuration - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// Speed and power modes SP: u2, reserved0: u1, @@ -10766,7 +10766,7 @@ pub const registers = struct { /// address: 0x40013200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between READY event and SAMPLE task READY_SAMPLE: u1, /// Shortcut between READY event and STOP task @@ -10808,7 +10808,7 @@ pub const registers = struct { /// address: 0x40013304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for READY event READY: u1, /// Write '1' to Enable interrupt for DOWN event @@ -10849,7 +10849,7 @@ pub const registers = struct { /// address: 0x40013308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for READY event READY: u1, /// Write '1' to Disable interrupt for DOWN event @@ -10940,7 +10940,7 @@ pub const registers = struct { /// address: 0x40014300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -10993,7 +10993,7 @@ pub const registers = struct { /// address: 0x40014304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11046,7 +11046,7 @@ pub const registers = struct { /// address: 0x40014308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -11121,7 +11121,7 @@ pub const registers = struct { /// address: 0x40015300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -11174,7 +11174,7 @@ pub const registers = struct { /// address: 0x40015304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11227,7 +11227,7 @@ pub const registers = struct { /// address: 0x40015308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -11302,7 +11302,7 @@ pub const registers = struct { /// address: 0x40016300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -11355,7 +11355,7 @@ pub const registers = struct { /// address: 0x40016304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11408,7 +11408,7 @@ pub const registers = struct { /// address: 0x40016308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -11483,7 +11483,7 @@ pub const registers = struct { /// address: 0x40017300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -11536,7 +11536,7 @@ pub const registers = struct { /// address: 0x40017304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11589,7 +11589,7 @@ pub const registers = struct { /// address: 0x40017308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -11664,7 +11664,7 @@ pub const registers = struct { /// address: 0x40018300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -11717,7 +11717,7 @@ pub const registers = struct { /// address: 0x40018304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11770,7 +11770,7 @@ pub const registers = struct { /// address: 0x40018308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -11845,7 +11845,7 @@ pub const registers = struct { /// address: 0x40019300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Enable or disable interrupt for TRIGGERED[1] event @@ -11898,7 +11898,7 @@ pub const registers = struct { /// address: 0x40019304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Enable interrupt for TRIGGERED[1] event @@ -11951,7 +11951,7 @@ pub const registers = struct { /// address: 0x40019308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TRIGGERED[0] event TRIGGERED0: u1, /// Write '1' to Disable interrupt for TRIGGERED[1] event @@ -12036,7 +12036,7 @@ pub const registers = struct { /// address: 0x4001a200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between COMPARE[0] event and CLEAR task COMPARE0_CLEAR: u1, /// Shortcut between COMPARE[1] event and CLEAR task @@ -12085,7 +12085,7 @@ pub const registers = struct { /// address: 0x4001a304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12128,7 +12128,7 @@ pub const registers = struct { /// address: 0x4001a308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12219,7 +12219,7 @@ pub const registers = struct { /// address: 0x4001b200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between COMPARE[0] event and CLEAR task COMPARE0_CLEAR: u1, /// Shortcut between COMPARE[1] event and CLEAR task @@ -12268,7 +12268,7 @@ pub const registers = struct { /// address: 0x4001b304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12311,7 +12311,7 @@ pub const registers = struct { /// address: 0x4001b308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12413,7 +12413,7 @@ pub const registers = struct { /// address: 0x4001c200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between SEQEND[0] event and STOP task SEQEND0_STOP: u1, /// Shortcut between SEQEND[1] event and STOP task @@ -12455,7 +12455,7 @@ pub const registers = struct { /// address: 0x4001c300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -12499,7 +12499,7 @@ pub const registers = struct { /// address: 0x4001c304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -12543,7 +12543,7 @@ pub const registers = struct { /// address: 0x4001c308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -12591,7 +12591,7 @@ pub const registers = struct { /// address: 0x4001c504 /// Selects operating mode of the wave counter - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// Selects up or up and down as wave counter mode UPDOWN: u1, padding0: u1, @@ -12637,7 +12637,7 @@ pub const registers = struct { /// address: 0x4001c510 /// Configuration of the decoder - pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct { /// How a sequence is read from RAM and spread to the compare register LOAD: u2, reserved0: u1, @@ -12675,7 +12675,7 @@ pub const registers = struct { /// address: 0x4001c514 /// Amount of playback of a loop - pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct { /// Amount of playback of pattern cycles CNT: u16, padding0: u1, @@ -12705,7 +12705,7 @@ pub const registers = struct { /// Description cluster[0]: Amount of additional PWM periods between samples loaded /// into compare register - REFRESH: Mmio(32, packed struct{ + REFRESH: Mmio(32, packed struct { /// Amount of additional PWM periods between samples loaded into compare register /// (load every REFRESH.CNT+1 PWM periods) CNT: u24, @@ -12720,7 +12720,7 @@ pub const registers = struct { }), /// Description cluster[0]: Time added after the sequence - ENDDELAY: Mmio(32, packed struct{ + ENDDELAY: Mmio(32, packed struct { /// Time added after the sequence in PWM periods CNT: u24, padding0: u1, @@ -12742,7 +12742,7 @@ pub const registers = struct { /// address: 0x4001c000 /// Description collection[0]: Output pin select for PWM channel 0 - pub const OUT = @intToPtr(*volatile [4]Mmio(32, packed struct{ + pub const OUT = @intToPtr(*volatile [4]Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -12803,7 +12803,7 @@ pub const registers = struct { /// address: 0x4001d300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for STARTED event STARTED: u1, /// Enable or disable interrupt for STOPPED event @@ -12843,7 +12843,7 @@ pub const registers = struct { /// address: 0x4001d304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for STARTED event STARTED: u1, /// Write '1' to Enable interrupt for STOPPED event @@ -12883,7 +12883,7 @@ pub const registers = struct { /// address: 0x4001d308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for STARTED event STARTED: u1, /// Write '1' to Disable interrupt for STOPPED event @@ -12927,14 +12927,14 @@ pub const registers = struct { /// address: 0x4001d504 /// PDM clock generator control - pub const PDMCLKCTRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PDMCLKCTRL = @intToPtr(*volatile Mmio(32, packed struct { /// PDM_CLK frequency FREQ: u32, }), base_address + 0x504); /// address: 0x4001d508 /// Defines the routing of the connected PDM microphones' signals - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// Mono or stereo operation OPERATION: u1, /// Defines on which PDM_CLK edge Left (or mono) is sampled @@ -12983,7 +12983,7 @@ pub const registers = struct { /// address: 0x4001d000 /// Pin number configuration for PDM CLK signal - pub const CLK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CLK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -13018,7 +13018,7 @@ pub const registers = struct { /// address: 0x4001d004 /// Pin number configuration for PDM DIN signal - pub const DIN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIN = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -13056,14 +13056,14 @@ pub const registers = struct { /// address: 0x4001d000 /// RAM address pointer to write samples to with EasyDMA - pub const PTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PTR = @intToPtr(*volatile Mmio(32, packed struct { /// Address to write PDM samples to over DMA SAMPLEPTR: u32, }), base_address + 0x0); /// address: 0x4001d004 /// Number of samples to allocate memory for in EasyDMA mode - pub const MAXCNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MAXCNT = @intToPtr(*volatile Mmio(32, packed struct { /// Length of DMA RAM allocation in number of samples BUFFSIZE: u15, padding0: u1, @@ -13096,7 +13096,7 @@ pub const registers = struct { /// address: 0x4001e504 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Program memory access mode. It is strongly recommended to only activate erase /// and write modes when they are actively used. Enabling write or erase will /// invalidate the cache and keep it invalidated. @@ -13157,7 +13157,7 @@ pub const registers = struct { /// address: 0x4001e540 /// I-Code cache configuration register. - pub const ICACHECNF = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICACHECNF = @intToPtr(*volatile Mmio(32, packed struct { /// Cache enable CACHEEN: u1, reserved0: u1, @@ -13196,14 +13196,14 @@ pub const registers = struct { /// address: 0x4001e548 /// I-Code cache hit counter. - pub const IHIT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IHIT = @intToPtr(*volatile Mmio(32, packed struct { /// Number of cache hits HITS: u32, }), base_address + 0x548); /// address: 0x4001e54c /// I-Code cache miss counter. - pub const IMISS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IMISS = @intToPtr(*volatile Mmio(32, packed struct { /// Number of cache misses MISSES: u32, }), base_address + 0x54c); @@ -13214,7 +13214,7 @@ pub const registers = struct { /// address: 0x4001f500 /// Channel enable register - pub const CHEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CHEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable channel 0 CH0: u1, /// Enable or disable channel 1 @@ -13283,7 +13283,7 @@ pub const registers = struct { /// address: 0x4001f504 /// Channel enable set register - pub const CHENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CHENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 0 enable set register. Writing '0' has no effect CH0: u1, /// Channel 1 enable set register. Writing '0' has no effect @@ -13352,7 +13352,7 @@ pub const registers = struct { /// address: 0x4001f508 /// Channel enable clear register - pub const CHENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CHENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 0 enable clear register. Writing '0' has no effect CH0: u1, /// Channel 1 enable clear register. Writing '0' has no effect @@ -13421,7 +13421,7 @@ pub const registers = struct { /// address: 0x4001f800 /// Description collection[0]: Channel group 0 - pub const CHG = @intToPtr(*volatile [6]Mmio(32, packed struct{ + pub const CHG = @intToPtr(*volatile [6]Mmio(32, packed struct { /// Include or exclude channel 0 CH0: u1, /// Include or exclude channel 1 @@ -13518,7 +13518,7 @@ pub const registers = struct { /// address: 0x40020300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable interrupt for REGION[0].WA event REGION0WA: u1, /// Enable or disable interrupt for REGION[0].RA event @@ -13567,7 +13567,7 @@ pub const registers = struct { /// address: 0x40020304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for REGION[0].WA event REGION0WA: u1, /// Write '1' to Enable interrupt for REGION[0].RA event @@ -13616,7 +13616,7 @@ pub const registers = struct { /// address: 0x40020308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for REGION[0].WA event REGION0WA: u1, /// Write '1' to Disable interrupt for REGION[0].RA event @@ -13665,7 +13665,7 @@ pub const registers = struct { /// address: 0x40020320 /// Enable or disable non-maskable interrupt - pub const NMIEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NMIEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable non-maskable interrupt for REGION[0].WA event REGION0WA: u1, /// Enable or disable non-maskable interrupt for REGION[0].RA event @@ -13714,7 +13714,7 @@ pub const registers = struct { /// address: 0x40020324 /// Enable non-maskable interrupt - pub const NMIENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NMIENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable non-maskable interrupt for REGION[0].WA event REGION0WA: u1, /// Write '1' to Enable non-maskable interrupt for REGION[0].RA event @@ -13763,7 +13763,7 @@ pub const registers = struct { /// address: 0x40020328 /// Disable non-maskable interrupt - pub const NMIENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const NMIENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable non-maskable interrupt for REGION[0].WA event REGION0WA: u1, /// Write '1' to Disable non-maskable interrupt for REGION[0].RA event @@ -13812,7 +13812,7 @@ pub const registers = struct { /// address: 0x40020510 /// Enable/disable regions watch - pub const REGIONEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const REGIONEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable/disable write access watch in region[0] RGN0WA: u1, /// Enable/disable read access watch in region[0] @@ -13861,7 +13861,7 @@ pub const registers = struct { /// address: 0x40020514 /// Enable regions watch - pub const REGIONENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const REGIONENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Enable write access watch in region[0] RGN0WA: u1, /// Enable read access watch in region[0] @@ -13910,7 +13910,7 @@ pub const registers = struct { /// address: 0x40020518 /// Disable regions watch - pub const REGIONENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const REGIONENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Disable write access watch in region[0] RGN0WA: u1, /// Disable read access watch in region[0] @@ -13976,7 +13976,7 @@ pub const registers = struct { pub const PERREGION = @ptrCast(*volatile [2]packed struct { /// Description cluster[0]: Source of event/interrupt in region 0, write access /// detected while corresponding subregion was enabled for watching - SUBSTATWA: Mmio(32, packed struct{ + SUBSTATWA: Mmio(32, packed struct { /// Subregion 0 in region 0 (write '1' to clear) SR0: u1, /// Subregion 1 in region 0 (write '1' to clear) @@ -14045,7 +14045,7 @@ pub const registers = struct { /// Description cluster[0]: Source of event/interrupt in region 0, read access /// detected while corresponding subregion was enabled for watching - SUBSTATRA: Mmio(32, packed struct{ + SUBSTATRA: Mmio(32, packed struct { /// Subregion 0 in region 0 (write '1' to clear) SR0: u1, /// Subregion 1 in region 0 (write '1' to clear) @@ -14131,7 +14131,7 @@ pub const registers = struct { END: u32, /// Description cluster[0]: Subregions of region 0 - SUBS: Mmio(32, packed struct{ + SUBS: Mmio(32, packed struct { /// Include or exclude subregion 0 in region SR0: u1, /// Include or exclude subregion 1 in region @@ -14245,7 +14245,7 @@ pub const registers = struct { /// address: 0x40021200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between SEQEND[0] event and STOP task SEQEND0_STOP: u1, /// Shortcut between SEQEND[1] event and STOP task @@ -14287,7 +14287,7 @@ pub const registers = struct { /// address: 0x40021300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -14331,7 +14331,7 @@ pub const registers = struct { /// address: 0x40021304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -14375,7 +14375,7 @@ pub const registers = struct { /// address: 0x40021308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -14423,7 +14423,7 @@ pub const registers = struct { /// address: 0x40021504 /// Selects operating mode of the wave counter - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// Selects up or up and down as wave counter mode UPDOWN: u1, padding0: u1, @@ -14469,7 +14469,7 @@ pub const registers = struct { /// address: 0x40021510 /// Configuration of the decoder - pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct { /// How a sequence is read from RAM and spread to the compare register LOAD: u2, reserved0: u1, @@ -14507,7 +14507,7 @@ pub const registers = struct { /// address: 0x40021514 /// Amount of playback of a loop - pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct { /// Amount of playback of pattern cycles CNT: u16, padding0: u1, @@ -14573,7 +14573,7 @@ pub const registers = struct { /// address: 0x40022200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { /// Shortcut between SEQEND[0] event and STOP task SEQEND0_STOP: u1, /// Shortcut between SEQEND[1] event and STOP task @@ -14615,7 +14615,7 @@ pub const registers = struct { /// address: 0x40022300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for STOPPED event STOPPED: u1, @@ -14659,7 +14659,7 @@ pub const registers = struct { /// address: 0x40022304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -14703,7 +14703,7 @@ pub const registers = struct { /// address: 0x40022308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -14751,7 +14751,7 @@ pub const registers = struct { /// address: 0x40022504 /// Selects operating mode of the wave counter - pub const MODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODE = @intToPtr(*volatile Mmio(32, packed struct { /// Selects up or up and down as wave counter mode UPDOWN: u1, padding0: u1, @@ -14797,7 +14797,7 @@ pub const registers = struct { /// address: 0x40022510 /// Configuration of the decoder - pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DECODER = @intToPtr(*volatile Mmio(32, packed struct { /// How a sequence is read from RAM and spread to the compare register LOAD: u2, reserved0: u1, @@ -14835,7 +14835,7 @@ pub const registers = struct { /// address: 0x40022514 /// Amount of playback of a loop - pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LOOP = @intToPtr(*volatile Mmio(32, packed struct { /// Amount of playback of pattern cycles CNT: u16, padding0: u1, @@ -14898,7 +14898,7 @@ pub const registers = struct { /// address: 0x40023200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -14936,7 +14936,7 @@ pub const registers = struct { /// address: 0x40023304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for STOPPED event STOPPED: u1, @@ -14978,7 +14978,7 @@ pub const registers = struct { /// address: 0x40023308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for STOPPED event STOPPED: u1, @@ -15028,7 +15028,7 @@ pub const registers = struct { /// address: 0x40023554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -15097,7 +15097,7 @@ pub const registers = struct { /// address: 0x40023200 /// Shortcut register - pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHORTS = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Shortcut between END event and ACQUIRE task @@ -15135,7 +15135,7 @@ pub const registers = struct { /// address: 0x40023304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for END event END: u1, @@ -15175,7 +15175,7 @@ pub const registers = struct { /// address: 0x40023308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for END event END: u1, @@ -15219,7 +15219,7 @@ pub const registers = struct { /// address: 0x40023440 /// Status from last transaction - pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STATUS = @intToPtr(*volatile Mmio(32, packed struct { /// TX buffer over-read detected, and prevented OVERREAD: u1, /// RX buffer overflow detected, and prevented @@ -15262,7 +15262,7 @@ pub const registers = struct { /// address: 0x40023554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -15318,7 +15318,7 @@ pub const registers = struct { /// address: 0x40023304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Enable interrupt for READY event @@ -15356,7 +15356,7 @@ pub const registers = struct { /// address: 0x40023308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Write '1' to Disable interrupt for READY event @@ -15410,7 +15410,7 @@ pub const registers = struct { /// address: 0x40023554 /// Configuration register - pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CONFIG = @intToPtr(*volatile Mmio(32, packed struct { /// Bit order ORDER: u1, /// Serial clock (SCK) phase @@ -15482,7 +15482,7 @@ pub const registers = struct { /// address: 0x40024304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable interrupt for TICK event TICK: u1, /// Write '1' to Enable interrupt for OVRFLW event @@ -15525,7 +15525,7 @@ pub const registers = struct { /// address: 0x40024308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable interrupt for TICK event TICK: u1, /// Write '1' to Disable interrupt for OVRFLW event @@ -15568,7 +15568,7 @@ pub const registers = struct { /// address: 0x40024340 /// Enable or disable event routing - pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTEN = @intToPtr(*volatile Mmio(32, packed struct { /// Enable or disable event routing for TICK event TICK: u1, /// Enable or disable event routing for OVRFLW event @@ -15611,7 +15611,7 @@ pub const registers = struct { /// address: 0x40024344 /// Enable event routing - pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENSET = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Enable event routing for TICK event TICK: u1, /// Write '1' to Enable event routing for OVRFLW event @@ -15654,7 +15654,7 @@ pub const registers = struct { /// address: 0x40024348 /// Disable event routing - pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVTENCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Write '1' to Disable event routing for TICK event TICK: u1, /// Write '1' to Disable event routing for OVRFLW event @@ -15706,7 +15706,7 @@ pub const registers = struct { /// address: 0x40024540 /// Description collection[0]: Compare register 0 - pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct{ + pub const CC = @intToPtr(*volatile [4]Mmio(32, packed struct { /// Compare value COMPARE: u24, padding0: u1, @@ -15750,7 +15750,7 @@ pub const registers = struct { /// address: 0x40025300 /// Enable or disable interrupt - pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTEN = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Enable or disable interrupt for RXPTRUPD event RXPTRUPD: u1, @@ -15790,7 +15790,7 @@ pub const registers = struct { /// address: 0x40025304 /// Enable interrupt - pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENSET = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Enable interrupt for RXPTRUPD event RXPTRUPD: u1, @@ -15830,7 +15830,7 @@ pub const registers = struct { /// address: 0x40025308 /// Disable interrupt - pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const INTENCLR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Write '1' to Disable interrupt for RXPTRUPD event RXPTRUPD: u1, @@ -15940,7 +15940,7 @@ pub const registers = struct { /// address: 0x40025000 /// Pin select for MCK signal. - pub const MCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -15975,7 +15975,7 @@ pub const registers = struct { /// address: 0x40025004 /// Pin select for SCK signal. - pub const SCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -16010,7 +16010,7 @@ pub const registers = struct { /// address: 0x40025008 /// Pin select for LRCK signal. - pub const LRCK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LRCK = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -16045,7 +16045,7 @@ pub const registers = struct { /// address: 0x4002500c /// Pin select for SDIN signal. - pub const SDIN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SDIN = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -16080,7 +16080,7 @@ pub const registers = struct { /// address: 0x40025010 /// Pin select for SDOUT signal. - pub const SDOUT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SDOUT = @intToPtr(*volatile Mmio(32, packed struct { /// Pin number PIN: u5, reserved0: u1, @@ -16128,7 +16128,7 @@ pub const registers = struct { /// address: 0x50000504 /// Write GPIO port - pub const OUT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OUT = @intToPtr(*volatile Mmio(32, packed struct { /// Pin 0 PIN0: u1, /// Pin 1 @@ -16197,7 +16197,7 @@ pub const registers = struct { /// address: 0x50000508 /// Set individual bits in GPIO port - pub const OUTSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OUTSET = @intToPtr(*volatile Mmio(32, packed struct { /// Pin 0 PIN0: u1, /// Pin 1 @@ -16266,7 +16266,7 @@ pub const registers = struct { /// address: 0x5000050c /// Clear individual bits in GPIO port - pub const OUTCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OUTCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Pin 0 PIN0: u1, /// Pin 1 @@ -16335,7 +16335,7 @@ pub const registers = struct { /// address: 0x50000510 /// Read GPIO port - pub const IN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IN = @intToPtr(*volatile Mmio(32, packed struct { /// Pin 0 PIN0: u1, /// Pin 1 @@ -16404,7 +16404,7 @@ pub const registers = struct { /// address: 0x50000514 /// Direction of GPIO pins - pub const DIR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIR = @intToPtr(*volatile Mmio(32, packed struct { /// Pin 0 PIN0: u1, /// Pin 1 @@ -16473,7 +16473,7 @@ pub const registers = struct { /// address: 0x50000518 /// DIR set register - pub const DIRSET = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIRSET = @intToPtr(*volatile Mmio(32, packed struct { /// Set as output pin 0 PIN0: u1, /// Set as output pin 1 @@ -16542,7 +16542,7 @@ pub const registers = struct { /// address: 0x5000051c /// DIR clear register - pub const DIRCLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIRCLR = @intToPtr(*volatile Mmio(32, packed struct { /// Set as input pin 0 PIN0: u1, /// Set as input pin 1 @@ -16612,7 +16612,7 @@ pub const registers = struct { /// address: 0x50000520 /// Latch register indicating what GPIO pins that have met the criteria set in the /// PIN_CNF[n].SENSE registers - pub const LATCH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LATCH = @intToPtr(*volatile Mmio(32, packed struct { /// Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write /// '1' to clear. PIN0: u1, @@ -16717,7 +16717,7 @@ pub const registers = struct { /// address: 0x50000700 /// Description collection[0]: Configuration of GPIO pins - pub const PIN_CNF = @intToPtr(*volatile [32]Mmio(32, packed struct{ + pub const PIN_CNF = @intToPtr(*volatile [32]Mmio(32, packed struct { /// Pin direction. Same physical register as DIR register DIR: u1, /// Connect or disconnect input buffer diff --git a/src/modules/chips/stm32f103/registers.zig b/src/modules/chips/stm32f103/registers.zig index 6c72470..10d7649 100644 --- a/src/modules/chips/stm32f103/registers.zig +++ b/src/modules/chips/stm32f103/registers.zig @@ -10,7 +10,7 @@ pub const registers = struct { /// address: 0xa0000000 /// SRAM/NOR-Flash chip-select control register /// 1 - pub const BCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -59,7 +59,7 @@ pub const registers = struct { /// address: 0xa0000004 /// SRAM/NOR-Flash chip-select timing register /// 1 - pub const BTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -81,7 +81,7 @@ pub const registers = struct { /// address: 0xa0000008 /// SRAM/NOR-Flash chip-select control register /// 2 - pub const BCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -131,7 +131,7 @@ pub const registers = struct { /// address: 0xa000000c /// SRAM/NOR-Flash chip-select timing register /// 2 - pub const BTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -153,7 +153,7 @@ pub const registers = struct { /// address: 0xa0000010 /// SRAM/NOR-Flash chip-select control register /// 3 - pub const BCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -203,7 +203,7 @@ pub const registers = struct { /// address: 0xa0000014 /// SRAM/NOR-Flash chip-select timing register /// 3 - pub const BTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -225,7 +225,7 @@ pub const registers = struct { /// address: 0xa0000018 /// SRAM/NOR-Flash chip-select control register /// 4 - pub const BCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -275,7 +275,7 @@ pub const registers = struct { /// address: 0xa000001c /// SRAM/NOR-Flash chip-select timing register /// 4 - pub const BTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -297,7 +297,7 @@ pub const registers = struct { /// address: 0xa0000060 /// PC Card/NAND Flash control register /// 2 - pub const PCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -334,7 +334,7 @@ pub const registers = struct { /// address: 0xa0000064 /// FIFO status and interrupt register /// 2 - pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -379,7 +379,7 @@ pub const registers = struct { /// address: 0xa0000068 /// Common memory space timing register /// 2 - pub const PMEM2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM2 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -393,7 +393,7 @@ pub const registers = struct { /// address: 0xa000006c /// Attribute memory space timing register /// 2 - pub const PATT2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT2 = @intToPtr(*volatile Mmio(32, packed struct { /// Attribute memory x setup /// time ATTSETx: u8, @@ -410,7 +410,7 @@ pub const registers = struct { /// address: 0xa0000074 /// ECC result register 2 - pub const ECCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ECCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ECC result ECCx: u32, }), base_address + 0x74); @@ -418,7 +418,7 @@ pub const registers = struct { /// address: 0xa0000080 /// PC Card/NAND Flash control register /// 3 - pub const PCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR3 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -455,7 +455,7 @@ pub const registers = struct { /// address: 0xa0000084 /// FIFO status and interrupt register /// 3 - pub const SR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR3 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -500,7 +500,7 @@ pub const registers = struct { /// address: 0xa0000088 /// Common memory space timing register /// 3 - pub const PMEM3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM3 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -514,7 +514,7 @@ pub const registers = struct { /// address: 0xa000008c /// Attribute memory space timing register /// 3 - pub const PATT3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT3 = @intToPtr(*volatile Mmio(32, packed struct { /// ATTSETx ATTSETx: u8, /// ATTWAITx @@ -527,7 +527,7 @@ pub const registers = struct { /// address: 0xa0000094 /// ECC result register 3 - pub const ECCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ECCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ECCx ECCx: u32, }), base_address + 0x94); @@ -535,7 +535,7 @@ pub const registers = struct { /// address: 0xa00000a0 /// PC Card/NAND Flash control register /// 4 - pub const PCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR4 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -572,7 +572,7 @@ pub const registers = struct { /// address: 0xa00000a4 /// FIFO status and interrupt register /// 4 - pub const SR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR4 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -617,7 +617,7 @@ pub const registers = struct { /// address: 0xa00000a8 /// Common memory space timing register /// 4 - pub const PMEM4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM4 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -631,7 +631,7 @@ pub const registers = struct { /// address: 0xa00000ac /// Attribute memory space timing register /// 4 - pub const PATT4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT4 = @intToPtr(*volatile Mmio(32, packed struct { /// ATTSETx ATTSETx: u8, /// ATTWAITx @@ -644,7 +644,7 @@ pub const registers = struct { /// address: 0xa00000b0 /// I/O space timing register 4 - pub const PIO4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PIO4 = @intToPtr(*volatile Mmio(32, packed struct { /// IOSETx IOSETx: u8, /// IOWAITx @@ -658,7 +658,7 @@ pub const registers = struct { /// address: 0xa0000104 /// SRAM/NOR-Flash write timing registers /// 1 - pub const BWTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -682,7 +682,7 @@ pub const registers = struct { /// address: 0xa000010c /// SRAM/NOR-Flash write timing registers /// 2 - pub const BWTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -706,7 +706,7 @@ pub const registers = struct { /// address: 0xa0000114 /// SRAM/NOR-Flash write timing registers /// 3 - pub const BWTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -730,7 +730,7 @@ pub const registers = struct { /// address: 0xa000011c /// SRAM/NOR-Flash write timing registers /// 4 - pub const BWTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -758,7 +758,7 @@ pub const registers = struct { /// address: 0x40007000 /// Power control register /// (PWR_CR) - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Low Power Deep Sleep LPDS: u1, /// Power Down Deep Sleep @@ -803,7 +803,7 @@ pub const registers = struct { /// address: 0x40007004 /// Power control register /// (PWR_CR) - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Wake-Up Flag WUF: u1, /// STANDBY Flag @@ -848,7 +848,7 @@ pub const registers = struct { /// address: 0x40021000 /// Clock control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Internal High Speed clock /// enable HSION: u1, @@ -893,7 +893,7 @@ pub const registers = struct { /// address: 0x40021004 /// Clock configuration register /// (RCC_CFGR) - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// System clock Switch SW: u2, /// System Clock Switch Status @@ -930,7 +930,7 @@ pub const registers = struct { /// address: 0x40021008 /// Clock interrupt register /// (RCC_CIR) - pub const CIR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CIR = @intToPtr(*volatile Mmio(32, packed struct { /// LSI Ready Interrupt flag LSIRDYF: u1, /// LSE Ready Interrupt flag @@ -987,7 +987,7 @@ pub const registers = struct { /// address: 0x4002100c /// APB2 peripheral reset register /// (RCC_APB2RSTR) - pub const APB2RSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB2RSTR = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function I/O /// reset AFIORST: u1, @@ -1044,7 +1044,7 @@ pub const registers = struct { /// address: 0x40021010 /// APB1 peripheral reset register /// (RCC_APB1RSTR) - pub const APB1RSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB1RSTR = @intToPtr(*volatile Mmio(32, packed struct { /// Timer 2 reset TIM2RST: u1, /// Timer 3 reset @@ -1105,7 +1105,7 @@ pub const registers = struct { /// address: 0x40021014 /// AHB Peripheral Clock enable register /// (RCC_AHBENR) - pub const AHBENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AHBENR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA1 clock enable DMA1EN: u1, /// DMA2 clock enable @@ -1151,7 +1151,7 @@ pub const registers = struct { /// address: 0x40021018 /// APB2 peripheral clock enable register /// (RCC_APB2ENR) - pub const APB2ENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB2ENR = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function I/O clock /// enable AFIOEN: u1, @@ -1211,7 +1211,7 @@ pub const registers = struct { /// address: 0x4002101c /// APB1 peripheral clock enable register /// (RCC_APB1ENR) - pub const APB1ENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB1ENR = @intToPtr(*volatile Mmio(32, packed struct { /// Timer 2 clock enable TIM2EN: u1, /// Timer 3 clock enable @@ -1275,7 +1275,7 @@ pub const registers = struct { /// address: 0x40021020 /// Backup domain control register /// (RCC_BDCR) - pub const BDCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDCR = @intToPtr(*volatile Mmio(32, packed struct { /// External Low Speed oscillator /// enable LSEON: u1, @@ -1322,7 +1322,7 @@ pub const registers = struct { /// address: 0x40021024 /// Control/status register /// (RCC_CSR) - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Internal low speed oscillator /// enable LSION: u1, @@ -1376,7 +1376,7 @@ pub const registers = struct { /// address: 0x40010800 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -1422,7 +1422,7 @@ pub const registers = struct { /// address: 0x40010804 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -1468,7 +1468,7 @@ pub const registers = struct { /// address: 0x40010808 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -1522,7 +1522,7 @@ pub const registers = struct { /// address: 0x4001080c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -1576,7 +1576,7 @@ pub const registers = struct { /// address: 0x40010810 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -1646,7 +1646,7 @@ pub const registers = struct { /// address: 0x40010814 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -1700,7 +1700,7 @@ pub const registers = struct { /// address: 0x40010818 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -1758,7 +1758,7 @@ pub const registers = struct { /// address: 0x40010c00 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -1804,7 +1804,7 @@ pub const registers = struct { /// address: 0x40010c04 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -1850,7 +1850,7 @@ pub const registers = struct { /// address: 0x40010c08 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -1904,7 +1904,7 @@ pub const registers = struct { /// address: 0x40010c0c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -1958,7 +1958,7 @@ pub const registers = struct { /// address: 0x40010c10 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -2028,7 +2028,7 @@ pub const registers = struct { /// address: 0x40010c14 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -2082,7 +2082,7 @@ pub const registers = struct { /// address: 0x40010c18 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -2140,7 +2140,7 @@ pub const registers = struct { /// address: 0x40011000 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -2186,7 +2186,7 @@ pub const registers = struct { /// address: 0x40011004 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -2232,7 +2232,7 @@ pub const registers = struct { /// address: 0x40011008 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -2286,7 +2286,7 @@ pub const registers = struct { /// address: 0x4001100c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -2340,7 +2340,7 @@ pub const registers = struct { /// address: 0x40011010 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -2410,7 +2410,7 @@ pub const registers = struct { /// address: 0x40011014 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -2464,7 +2464,7 @@ pub const registers = struct { /// address: 0x40011018 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -2522,7 +2522,7 @@ pub const registers = struct { /// address: 0x40011400 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -2568,7 +2568,7 @@ pub const registers = struct { /// address: 0x40011404 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -2614,7 +2614,7 @@ pub const registers = struct { /// address: 0x40011408 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -2668,7 +2668,7 @@ pub const registers = struct { /// address: 0x4001140c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -2722,7 +2722,7 @@ pub const registers = struct { /// address: 0x40011410 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -2792,7 +2792,7 @@ pub const registers = struct { /// address: 0x40011414 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -2846,7 +2846,7 @@ pub const registers = struct { /// address: 0x40011418 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -2904,7 +2904,7 @@ pub const registers = struct { /// address: 0x40011800 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -2950,7 +2950,7 @@ pub const registers = struct { /// address: 0x40011804 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -2996,7 +2996,7 @@ pub const registers = struct { /// address: 0x40011808 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -3050,7 +3050,7 @@ pub const registers = struct { /// address: 0x4001180c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -3104,7 +3104,7 @@ pub const registers = struct { /// address: 0x40011810 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -3174,7 +3174,7 @@ pub const registers = struct { /// address: 0x40011814 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -3228,7 +3228,7 @@ pub const registers = struct { /// address: 0x40011818 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -3286,7 +3286,7 @@ pub const registers = struct { /// address: 0x40011c00 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -3332,7 +3332,7 @@ pub const registers = struct { /// address: 0x40011c04 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -3378,7 +3378,7 @@ pub const registers = struct { /// address: 0x40011c08 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -3432,7 +3432,7 @@ pub const registers = struct { /// address: 0x40011c0c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -3486,7 +3486,7 @@ pub const registers = struct { /// address: 0x40011c10 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -3556,7 +3556,7 @@ pub const registers = struct { /// address: 0x40011c14 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -3610,7 +3610,7 @@ pub const registers = struct { /// address: 0x40011c18 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -3668,7 +3668,7 @@ pub const registers = struct { /// address: 0x40012000 /// Port configuration register low /// (GPIOn_CRL) - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.0 mode bits MODE0: u2, /// Port n.0 configuration @@ -3714,7 +3714,7 @@ pub const registers = struct { /// address: 0x40012004 /// Port configuration register high /// (GPIOn_CRL) - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Port n.8 mode bits MODE8: u2, /// Port n.8 configuration @@ -3760,7 +3760,7 @@ pub const registers = struct { /// address: 0x40012008 /// Port input data register /// (GPIOn_IDR) - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data IDR0: u1, /// Port input data @@ -3814,7 +3814,7 @@ pub const registers = struct { /// address: 0x4001200c /// Port output data register /// (GPIOn_ODR) - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data ODR0: u1, /// Port output data @@ -3868,7 +3868,7 @@ pub const registers = struct { /// address: 0x40012010 /// Port bit set/reset register /// (GPIOn_BSRR) - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Set bit 0 BS0: u1, /// Set bit 1 @@ -3938,7 +3938,7 @@ pub const registers = struct { /// address: 0x40012014 /// Port bit reset register /// (GPIOn_BRR) - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit 0 BR0: u1, /// Reset bit 1 @@ -3992,7 +3992,7 @@ pub const registers = struct { /// address: 0x40012018 /// Port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port A Lock bit 0 LCK0: u1, /// Port A Lock bit 1 @@ -4051,7 +4051,7 @@ pub const registers = struct { /// address: 0x40010000 /// Event Control Register /// (AFIO_EVCR) - pub const EVCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EVCR = @intToPtr(*volatile Mmio(32, packed struct { /// Pin selection PIN: u4, /// Port selection @@ -4087,7 +4087,7 @@ pub const registers = struct { /// address: 0x40010004 /// AF remap and debug I/O configuration /// register (AFIO_MAPR) - pub const MAPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MAPR = @intToPtr(*volatile Mmio(32, packed struct { /// SPI1 remapping SPI1_REMAP: u1, /// I2C1 remapping @@ -4142,7 +4142,7 @@ pub const registers = struct { /// address: 0x40010008 /// External interrupt configuration register 1 /// (AFIO_EXTICR1) - pub const EXTICR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EXTICR1 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI0 configuration EXTI0: u4, /// EXTI1 configuration @@ -4172,7 +4172,7 @@ pub const registers = struct { /// address: 0x4001000c /// External interrupt configuration register 2 /// (AFIO_EXTICR2) - pub const EXTICR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EXTICR2 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI4 configuration EXTI4: u4, /// EXTI5 configuration @@ -4202,7 +4202,7 @@ pub const registers = struct { /// address: 0x40010010 /// External interrupt configuration register 3 /// (AFIO_EXTICR3) - pub const EXTICR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EXTICR3 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI8 configuration EXTI8: u4, /// EXTI9 configuration @@ -4232,7 +4232,7 @@ pub const registers = struct { /// address: 0x40010014 /// External interrupt configuration register 4 /// (AFIO_EXTICR4) - pub const EXTICR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EXTICR4 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI12 configuration EXTI12: u4, /// EXTI13 configuration @@ -4262,7 +4262,7 @@ pub const registers = struct { /// address: 0x4001001c /// AF remap and debug I/O configuration /// register - pub const MAPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MAPR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -4310,7 +4310,7 @@ pub const registers = struct { /// address: 0x40010400 /// Interrupt mask register /// (EXTI_IMR) - pub const IMR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IMR = @intToPtr(*volatile Mmio(32, packed struct { /// Interrupt Mask on line 0 MR0: u1, /// Interrupt Mask on line 1 @@ -4366,7 +4366,7 @@ pub const registers = struct { /// address: 0x40010404 /// Event mask register (EXTI_EMR) - pub const EMR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EMR = @intToPtr(*volatile Mmio(32, packed struct { /// Event Mask on line 0 MR0: u1, /// Event Mask on line 1 @@ -4423,7 +4423,7 @@ pub const registers = struct { /// address: 0x40010408 /// Rising Trigger selection register /// (EXTI_RTSR) - pub const RTSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTSR = @intToPtr(*volatile Mmio(32, packed struct { /// Rising trigger event configuration of /// line 0 TR0: u1, @@ -4499,7 +4499,7 @@ pub const registers = struct { /// address: 0x4001040c /// Falling Trigger selection register /// (EXTI_FTSR) - pub const FTSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FTSR = @intToPtr(*volatile Mmio(32, packed struct { /// Falling trigger event configuration of /// line 0 TR0: u1, @@ -4575,7 +4575,7 @@ pub const registers = struct { /// address: 0x40010410 /// Software interrupt event register /// (EXTI_SWIER) - pub const SWIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SWIER = @intToPtr(*volatile Mmio(32, packed struct { /// Software Interrupt on line /// 0 SWIER0: u1, @@ -4650,7 +4650,7 @@ pub const registers = struct { /// address: 0x40010414 /// Pending register (EXTI_PR) - pub const PR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PR = @intToPtr(*volatile Mmio(32, packed struct { /// Pending bit 0 PR0: u1, /// Pending bit 1 @@ -4711,7 +4711,7 @@ pub const registers = struct { /// address: 0x40020000 /// DMA interrupt status register /// (DMA_ISR) - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// flag GIF1: u1, @@ -4805,7 +4805,7 @@ pub const registers = struct { /// address: 0x40020004 /// DMA interrupt flag clear register /// (DMA_IFCR) - pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// clear CGIF1: u1, @@ -4899,7 +4899,7 @@ pub const registers = struct { /// address: 0x40020008 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -4949,7 +4949,7 @@ pub const registers = struct { /// address: 0x4002000c /// DMA channel 1 number of data /// register - pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -4973,7 +4973,7 @@ pub const registers = struct { /// address: 0x40020010 /// DMA channel 1 peripheral address /// register - pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x10); @@ -4981,7 +4981,7 @@ pub const registers = struct { /// address: 0x40020014 /// DMA channel 1 memory address /// register - pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x14); @@ -4989,7 +4989,7 @@ pub const registers = struct { /// address: 0x4002001c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5039,7 +5039,7 @@ pub const registers = struct { /// address: 0x40020020 /// DMA channel 2 number of data /// register - pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5063,7 +5063,7 @@ pub const registers = struct { /// address: 0x40020024 /// DMA channel 2 peripheral address /// register - pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x24); @@ -5071,7 +5071,7 @@ pub const registers = struct { /// address: 0x40020028 /// DMA channel 2 memory address /// register - pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x28); @@ -5079,7 +5079,7 @@ pub const registers = struct { /// address: 0x40020030 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5129,7 +5129,7 @@ pub const registers = struct { /// address: 0x40020034 /// DMA channel 3 number of data /// register - pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5153,7 +5153,7 @@ pub const registers = struct { /// address: 0x40020038 /// DMA channel 3 peripheral address /// register - pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x38); @@ -5161,7 +5161,7 @@ pub const registers = struct { /// address: 0x4002003c /// DMA channel 3 memory address /// register - pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x3c); @@ -5169,7 +5169,7 @@ pub const registers = struct { /// address: 0x40020044 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5219,7 +5219,7 @@ pub const registers = struct { /// address: 0x40020048 /// DMA channel 4 number of data /// register - pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5243,7 +5243,7 @@ pub const registers = struct { /// address: 0x4002004c /// DMA channel 4 peripheral address /// register - pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x4c); @@ -5251,7 +5251,7 @@ pub const registers = struct { /// address: 0x40020050 /// DMA channel 4 memory address /// register - pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x50); @@ -5259,7 +5259,7 @@ pub const registers = struct { /// address: 0x40020058 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5309,7 +5309,7 @@ pub const registers = struct { /// address: 0x4002005c /// DMA channel 5 number of data /// register - pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5333,7 +5333,7 @@ pub const registers = struct { /// address: 0x40020060 /// DMA channel 5 peripheral address /// register - pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x60); @@ -5341,7 +5341,7 @@ pub const registers = struct { /// address: 0x40020064 /// DMA channel 5 memory address /// register - pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x64); @@ -5349,7 +5349,7 @@ pub const registers = struct { /// address: 0x4002006c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5399,7 +5399,7 @@ pub const registers = struct { /// address: 0x40020070 /// DMA channel 6 number of data /// register - pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5423,7 +5423,7 @@ pub const registers = struct { /// address: 0x40020074 /// DMA channel 6 peripheral address /// register - pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x74); @@ -5431,7 +5431,7 @@ pub const registers = struct { /// address: 0x40020078 /// DMA channel 6 memory address /// register - pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x78); @@ -5439,7 +5439,7 @@ pub const registers = struct { /// address: 0x40020080 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5489,7 +5489,7 @@ pub const registers = struct { /// address: 0x40020084 /// DMA channel 7 number of data /// register - pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5513,7 +5513,7 @@ pub const registers = struct { /// address: 0x40020088 /// DMA channel 7 peripheral address /// register - pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x88); @@ -5521,7 +5521,7 @@ pub const registers = struct { /// address: 0x4002008c /// DMA channel 7 memory address /// register - pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x8c); @@ -5532,7 +5532,7 @@ pub const registers = struct { /// address: 0x40020400 /// DMA interrupt status register /// (DMA_ISR) - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// flag GIF1: u1, @@ -5626,7 +5626,7 @@ pub const registers = struct { /// address: 0x40020404 /// DMA interrupt flag clear register /// (DMA_IFCR) - pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// clear CGIF1: u1, @@ -5720,7 +5720,7 @@ pub const registers = struct { /// address: 0x40020408 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5770,7 +5770,7 @@ pub const registers = struct { /// address: 0x4002040c /// DMA channel 1 number of data /// register - pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5794,7 +5794,7 @@ pub const registers = struct { /// address: 0x40020410 /// DMA channel 1 peripheral address /// register - pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x10); @@ -5802,7 +5802,7 @@ pub const registers = struct { /// address: 0x40020414 /// DMA channel 1 memory address /// register - pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x14); @@ -5810,7 +5810,7 @@ pub const registers = struct { /// address: 0x4002041c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5860,7 +5860,7 @@ pub const registers = struct { /// address: 0x40020420 /// DMA channel 2 number of data /// register - pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5884,7 +5884,7 @@ pub const registers = struct { /// address: 0x40020424 /// DMA channel 2 peripheral address /// register - pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x24); @@ -5892,7 +5892,7 @@ pub const registers = struct { /// address: 0x40020428 /// DMA channel 2 memory address /// register - pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x28); @@ -5900,7 +5900,7 @@ pub const registers = struct { /// address: 0x40020430 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -5950,7 +5950,7 @@ pub const registers = struct { /// address: 0x40020434 /// DMA channel 3 number of data /// register - pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -5974,7 +5974,7 @@ pub const registers = struct { /// address: 0x40020438 /// DMA channel 3 peripheral address /// register - pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x38); @@ -5982,7 +5982,7 @@ pub const registers = struct { /// address: 0x4002043c /// DMA channel 3 memory address /// register - pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x3c); @@ -5990,7 +5990,7 @@ pub const registers = struct { /// address: 0x40020444 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -6040,7 +6040,7 @@ pub const registers = struct { /// address: 0x40020448 /// DMA channel 4 number of data /// register - pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -6064,7 +6064,7 @@ pub const registers = struct { /// address: 0x4002044c /// DMA channel 4 peripheral address /// register - pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x4c); @@ -6072,7 +6072,7 @@ pub const registers = struct { /// address: 0x40020450 /// DMA channel 4 memory address /// register - pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x50); @@ -6080,7 +6080,7 @@ pub const registers = struct { /// address: 0x40020458 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -6130,7 +6130,7 @@ pub const registers = struct { /// address: 0x4002045c /// DMA channel 5 number of data /// register - pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -6154,7 +6154,7 @@ pub const registers = struct { /// address: 0x40020460 /// DMA channel 5 peripheral address /// register - pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x60); @@ -6162,7 +6162,7 @@ pub const registers = struct { /// address: 0x40020464 /// DMA channel 5 memory address /// register - pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x64); @@ -6170,7 +6170,7 @@ pub const registers = struct { /// address: 0x4002046c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -6220,7 +6220,7 @@ pub const registers = struct { /// address: 0x40020470 /// DMA channel 6 number of data /// register - pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -6244,7 +6244,7 @@ pub const registers = struct { /// address: 0x40020474 /// DMA channel 6 peripheral address /// register - pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x74); @@ -6252,7 +6252,7 @@ pub const registers = struct { /// address: 0x40020478 /// DMA channel 6 memory address /// register - pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x78); @@ -6260,7 +6260,7 @@ pub const registers = struct { /// address: 0x40020480 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -6310,7 +6310,7 @@ pub const registers = struct { /// address: 0x40020484 /// DMA channel 7 number of data /// register - pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -6334,7 +6334,7 @@ pub const registers = struct { /// address: 0x40020488 /// DMA channel 7 peripheral address /// register - pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x88); @@ -6342,7 +6342,7 @@ pub const registers = struct { /// address: 0x4002048c /// DMA channel 7 memory address /// register - pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x8c); @@ -6355,7 +6355,7 @@ pub const registers = struct { /// address: 0x40018000 /// Bits 1:0 = PWRCTRL: Power supply control /// bits - pub const POWER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const POWER = @intToPtr(*volatile Mmio(32, packed struct { /// PWRCTRL PWRCTRL: u2, padding0: u1, @@ -6393,7 +6393,7 @@ pub const registers = struct { /// address: 0x40018004 /// SDI clock control register /// (SDIO_CLKCR) - pub const CLKCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CLKCR = @intToPtr(*volatile Mmio(32, packed struct { /// Clock divide factor CLKDIV: u8, /// Clock enable bit @@ -6432,7 +6432,7 @@ pub const registers = struct { /// address: 0x40018008 /// Bits 31:0 = : Command argument - pub const ARG = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ARG = @intToPtr(*volatile Mmio(32, packed struct { /// Command argument CMDARG: u32, }), base_address + 0x8); @@ -6440,7 +6440,7 @@ pub const registers = struct { /// address: 0x4001800c /// SDIO command register /// (SDIO_CMD) - pub const CMD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMD = @intToPtr(*volatile Mmio(32, packed struct { /// CMDINDEX CMDINDEX: u6, /// WAITRESP @@ -6484,28 +6484,28 @@ pub const registers = struct { /// address: 0x40018014 /// Bits 31:0 = CARDSTATUS1 - pub const RESPI1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESPI1 = @intToPtr(*volatile Mmio(32, packed struct { /// CARDSTATUS1 CARDSTATUS1: u32, }), base_address + 0x14); /// address: 0x40018018 /// Bits 31:0 = CARDSTATUS2 - pub const RESP2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESP2 = @intToPtr(*volatile Mmio(32, packed struct { /// CARDSTATUS2 CARDSTATUS2: u32, }), base_address + 0x18); /// address: 0x4001801c /// Bits 31:0 = CARDSTATUS3 - pub const RESP3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESP3 = @intToPtr(*volatile Mmio(32, packed struct { /// CARDSTATUS3 CARDSTATUS3: u32, }), base_address + 0x1c); /// address: 0x40018020 /// Bits 31:0 = CARDSTATUS4 - pub const RESP4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RESP4 = @intToPtr(*volatile Mmio(32, packed struct { /// CARDSTATUS4 CARDSTATUS4: u32, }), base_address + 0x20); @@ -6513,7 +6513,7 @@ pub const registers = struct { /// address: 0x40018024 /// Bits 31:0 = DATATIME: Data timeout /// period - pub const DTIMER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DTIMER = @intToPtr(*volatile Mmio(32, packed struct { /// Data timeout period DATATIME: u32, }), base_address + 0x24); @@ -6521,7 +6521,7 @@ pub const registers = struct { /// address: 0x40018028 /// Bits 24:0 = DATALENGTH: Data length /// value - pub const DLEN = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DLEN = @intToPtr(*volatile Mmio(32, packed struct { /// Data length value DATALENGTH: u25, padding0: u1, @@ -6536,7 +6536,7 @@ pub const registers = struct { /// address: 0x4001802c /// SDIO data control register /// (SDIO_DCTRL) - pub const DCTRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCTRL = @intToPtr(*volatile Mmio(32, packed struct { /// DTEN DTEN: u1, /// DTDIR @@ -6580,7 +6580,7 @@ pub const registers = struct { /// address: 0x40018030 /// Bits 24:0 = DATACOUNT: Data count /// value - pub const DCOUNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCOUNT = @intToPtr(*volatile Mmio(32, packed struct { /// Data count value DATACOUNT: u25, padding0: u1, @@ -6595,7 +6595,7 @@ pub const registers = struct { /// address: 0x40018034 /// SDIO status register /// (SDIO_STA) - pub const STA = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STA = @intToPtr(*volatile Mmio(32, packed struct { /// CCRCFAIL CCRCFAIL: u1, /// DCRCFAIL @@ -6657,7 +6657,7 @@ pub const registers = struct { /// address: 0x40018038 /// SDIO interrupt clear register /// (SDIO_ICR) - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// CCRCFAILC CCRCFAILC: u1, /// DCRCFAILC @@ -6707,7 +6707,7 @@ pub const registers = struct { /// address: 0x4001803c /// SDIO mask register (SDIO_MASK) - pub const MASK = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MASK = @intToPtr(*volatile Mmio(32, packed struct { /// CCRCFAILIE CCRCFAILIE: u1, /// DCRCFAILIE @@ -6770,7 +6770,7 @@ pub const registers = struct { /// Bits 23:0 = FIFOCOUNT: Remaining number of /// words to be written to or read from the /// FIFO - pub const FIFOCNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FIFOCNT = @intToPtr(*volatile Mmio(32, packed struct { /// FIF0COUNT FIF0COUNT: u24, padding0: u1, @@ -6786,7 +6786,7 @@ pub const registers = struct { /// address: 0x40018080 /// bits 31:0 = FIFOData: Receive and transmit /// FIFO data - pub const FIFO = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FIFO = @intToPtr(*volatile Mmio(32, packed struct { /// FIFOData FIFOData: u32, }), base_address + 0x80); @@ -6797,7 +6797,7 @@ pub const registers = struct { /// address: 0x40002800 /// RTC Control Register High - pub const CRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRH = @intToPtr(*volatile Mmio(32, packed struct { /// Second interrupt Enable SECIE: u1, /// Alarm interrupt Enable @@ -6837,7 +6837,7 @@ pub const registers = struct { /// address: 0x40002804 /// RTC Control Register Low - pub const CRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRL = @intToPtr(*volatile Mmio(32, packed struct { /// Second Flag SECF: u1, /// Alarm Flag @@ -6921,7 +6921,7 @@ pub const registers = struct { /// address: 0x40006c04 /// Backup data register (BKP_DR) - pub const DR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D1: u16, padding0: u1, @@ -6944,7 +6944,7 @@ pub const registers = struct { /// address: 0x40006c08 /// Backup data register (BKP_DR) - pub const DR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D2: u16, padding0: u1, @@ -6967,7 +6967,7 @@ pub const registers = struct { /// address: 0x40006c0c /// Backup data register (BKP_DR) - pub const DR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D3: u16, padding0: u1, @@ -6990,7 +6990,7 @@ pub const registers = struct { /// address: 0x40006c10 /// Backup data register (BKP_DR) - pub const DR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D4: u16, padding0: u1, @@ -7013,7 +7013,7 @@ pub const registers = struct { /// address: 0x40006c14 /// Backup data register (BKP_DR) - pub const DR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D5: u16, padding0: u1, @@ -7036,7 +7036,7 @@ pub const registers = struct { /// address: 0x40006c18 /// Backup data register (BKP_DR) - pub const DR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D6: u16, padding0: u1, @@ -7059,7 +7059,7 @@ pub const registers = struct { /// address: 0x40006c1c /// Backup data register (BKP_DR) - pub const DR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D7: u16, padding0: u1, @@ -7082,7 +7082,7 @@ pub const registers = struct { /// address: 0x40006c20 /// Backup data register (BKP_DR) - pub const DR8 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR8 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D8: u16, padding0: u1, @@ -7105,7 +7105,7 @@ pub const registers = struct { /// address: 0x40006c24 /// Backup data register (BKP_DR) - pub const DR9 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR9 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D9: u16, padding0: u1, @@ -7128,7 +7128,7 @@ pub const registers = struct { /// address: 0x40006c28 /// Backup data register (BKP_DR) - pub const DR10 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR10 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D10: u16, padding0: u1, @@ -7163,7 +7163,7 @@ pub const registers = struct { /// address: 0x40006c4c /// Backup data register (BKP_DR) - pub const DR14 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR14 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D14: u16, padding0: u1, @@ -7186,7 +7186,7 @@ pub const registers = struct { /// address: 0x40006c50 /// Backup data register (BKP_DR) - pub const DR15 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR15 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D15: u16, padding0: u1, @@ -7209,7 +7209,7 @@ pub const registers = struct { /// address: 0x40006c54 /// Backup data register (BKP_DR) - pub const DR16 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR16 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D16: u16, padding0: u1, @@ -7232,7 +7232,7 @@ pub const registers = struct { /// address: 0x40006c58 /// Backup data register (BKP_DR) - pub const DR17 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR17 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D17: u16, padding0: u1, @@ -7255,7 +7255,7 @@ pub const registers = struct { /// address: 0x40006c5c /// Backup data register (BKP_DR) - pub const DR18 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR18 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D18: u16, padding0: u1, @@ -7278,7 +7278,7 @@ pub const registers = struct { /// address: 0x40006c60 /// Backup data register (BKP_DR) - pub const DR19 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR19 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D19: u16, padding0: u1, @@ -7301,7 +7301,7 @@ pub const registers = struct { /// address: 0x40006c64 /// Backup data register (BKP_DR) - pub const DR20 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR20 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D20: u16, padding0: u1, @@ -7324,7 +7324,7 @@ pub const registers = struct { /// address: 0x40006c68 /// Backup data register (BKP_DR) - pub const DR21 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR21 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D21: u16, padding0: u1, @@ -7347,7 +7347,7 @@ pub const registers = struct { /// address: 0x40006c6c /// Backup data register (BKP_DR) - pub const DR22 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR22 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D22: u16, padding0: u1, @@ -7370,7 +7370,7 @@ pub const registers = struct { /// address: 0x40006c70 /// Backup data register (BKP_DR) - pub const DR23 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR23 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D23: u16, padding0: u1, @@ -7393,7 +7393,7 @@ pub const registers = struct { /// address: 0x40006c74 /// Backup data register (BKP_DR) - pub const DR24 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR24 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D24: u16, padding0: u1, @@ -7416,7 +7416,7 @@ pub const registers = struct { /// address: 0x40006c78 /// Backup data register (BKP_DR) - pub const DR25 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR25 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D25: u16, padding0: u1, @@ -7439,7 +7439,7 @@ pub const registers = struct { /// address: 0x40006c7c /// Backup data register (BKP_DR) - pub const DR26 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR26 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D26: u16, padding0: u1, @@ -7462,7 +7462,7 @@ pub const registers = struct { /// address: 0x40006c80 /// Backup data register (BKP_DR) - pub const DR27 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR27 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D27: u16, padding0: u1, @@ -7485,7 +7485,7 @@ pub const registers = struct { /// address: 0x40006c84 /// Backup data register (BKP_DR) - pub const DR28 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR28 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D28: u16, padding0: u1, @@ -7508,7 +7508,7 @@ pub const registers = struct { /// address: 0x40006c88 /// Backup data register (BKP_DR) - pub const DR29 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR29 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D29: u16, padding0: u1, @@ -7531,7 +7531,7 @@ pub const registers = struct { /// address: 0x40006c8c /// Backup data register (BKP_DR) - pub const DR30 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR30 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D30: u16, padding0: u1, @@ -7554,7 +7554,7 @@ pub const registers = struct { /// address: 0x40006c90 /// Backup data register (BKP_DR) - pub const DR31 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR31 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D31: u16, padding0: u1, @@ -7577,7 +7577,7 @@ pub const registers = struct { /// address: 0x40006c94 /// Backup data register (BKP_DR) - pub const DR32 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR32 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D32: u16, padding0: u1, @@ -7600,7 +7600,7 @@ pub const registers = struct { /// address: 0x40006c98 /// Backup data register (BKP_DR) - pub const DR33 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR33 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D33: u16, padding0: u1, @@ -7623,7 +7623,7 @@ pub const registers = struct { /// address: 0x40006c9c /// Backup data register (BKP_DR) - pub const DR34 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR34 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D34: u16, padding0: u1, @@ -7646,7 +7646,7 @@ pub const registers = struct { /// address: 0x40006ca0 /// Backup data register (BKP_DR) - pub const DR35 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR35 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D35: u16, padding0: u1, @@ -7669,7 +7669,7 @@ pub const registers = struct { /// address: 0x40006ca4 /// Backup data register (BKP_DR) - pub const DR36 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR36 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D36: u16, padding0: u1, @@ -7692,7 +7692,7 @@ pub const registers = struct { /// address: 0x40006ca8 /// Backup data register (BKP_DR) - pub const DR37 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR37 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D37: u16, padding0: u1, @@ -7715,7 +7715,7 @@ pub const registers = struct { /// address: 0x40006cac /// Backup data register (BKP_DR) - pub const DR38 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR38 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D38: u16, padding0: u1, @@ -7738,7 +7738,7 @@ pub const registers = struct { /// address: 0x40006cb0 /// Backup data register (BKP_DR) - pub const DR39 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR39 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D39: u16, padding0: u1, @@ -7761,7 +7761,7 @@ pub const registers = struct { /// address: 0x40006cb4 /// Backup data register (BKP_DR) - pub const DR40 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR40 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D40: u16, padding0: u1, @@ -7784,7 +7784,7 @@ pub const registers = struct { /// address: 0x40006cb8 /// Backup data register (BKP_DR) - pub const DR41 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR41 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D41: u16, padding0: u1, @@ -7807,7 +7807,7 @@ pub const registers = struct { /// address: 0x40006cbc /// Backup data register (BKP_DR) - pub const DR42 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR42 = @intToPtr(*volatile Mmio(32, packed struct { /// Backup data D42: u16, padding0: u1, @@ -7831,7 +7831,7 @@ pub const registers = struct { /// address: 0x40006c2c /// RTC clock calibration register /// (BKP_RTCCR) - pub const RTCCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTCCR = @intToPtr(*volatile Mmio(32, packed struct { /// Calibration value CAL: u7, /// Calibration Clock Output @@ -7869,7 +7869,7 @@ pub const registers = struct { /// address: 0x40006c30 /// Backup control register /// (BKP_CR) - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Tamper pin enable TPE: u1, /// Tamper pin active level @@ -7909,7 +7909,7 @@ pub const registers = struct { /// address: 0x40006c34 /// BKP_CSR control/status register /// (BKP_CSR) - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Clear Tamper event CTE: u1, /// Clear Tamper Interrupt @@ -7956,7 +7956,7 @@ pub const registers = struct { /// address: 0x40003000 /// Key register (IWDG_KR) - pub const KR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const KR = @intToPtr(*volatile Mmio(32, packed struct { /// Key value KEY: u16, padding0: u1, @@ -7983,7 +7983,7 @@ pub const registers = struct { /// address: 0x40003008 /// Reload register (IWDG_RLR) - pub const RLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RLR = @intToPtr(*volatile Mmio(32, packed struct { /// Watchdog counter reload /// value RL: u12, @@ -8011,7 +8011,7 @@ pub const registers = struct { /// address: 0x4000300c /// Status register (IWDG_SR) - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Watchdog prescaler value /// update PVU: u1, @@ -8056,7 +8056,7 @@ pub const registers = struct { /// address: 0x40002c00 /// Control register (WWDG_CR) - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// 7-bit counter (MSB to LSB) T: u7, /// Activation bit @@ -8090,7 +8090,7 @@ pub const registers = struct { /// address: 0x40002c04 /// Configuration register /// (WWDG_CFR) - pub const CFR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFR = @intToPtr(*volatile Mmio(32, packed struct { /// 7-bit window value W: u7, /// Timer Base @@ -8123,7 +8123,7 @@ pub const registers = struct { /// address: 0x40002c08 /// Status register (WWDG_SR) - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Early Wakeup Interrupt EWI: u1, padding0: u1, @@ -8165,7 +8165,7 @@ pub const registers = struct { /// address: 0x40012c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -8209,7 +8209,7 @@ pub const registers = struct { /// address: 0x40012c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -8259,7 +8259,7 @@ pub const registers = struct { /// address: 0x40012c08 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -8295,7 +8295,7 @@ pub const registers = struct { /// address: 0x40012c0c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -8355,7 +8355,7 @@ pub const registers = struct { /// address: 0x40012c10 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -8412,7 +8412,7 @@ pub const registers = struct { /// address: 0x40012c14 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -8463,7 +8463,7 @@ pub const registers = struct { /// address: 0x40012c18 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -8513,7 +8513,7 @@ pub const registers = struct { /// address: 0x40012c18 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -8549,7 +8549,7 @@ pub const registers = struct { /// address: 0x40012c1c /// capture/compare mode register (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -8599,7 +8599,7 @@ pub const registers = struct { /// address: 0x40012c1c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare 3 /// selection CC3S: u2, @@ -8635,7 +8635,7 @@ pub const registers = struct { /// address: 0x40012c20 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -8728,7 +8728,7 @@ pub const registers = struct { /// address: 0x40012c48 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -8759,7 +8759,7 @@ pub const registers = struct { /// address: 0x40012c4c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -8783,7 +8783,7 @@ pub const registers = struct { /// address: 0x40012c30 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u8, padding0: u1, @@ -8814,7 +8814,7 @@ pub const registers = struct { /// address: 0x40012c44 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -8856,7 +8856,7 @@ pub const registers = struct { /// address: 0x40013400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -8900,7 +8900,7 @@ pub const registers = struct { /// address: 0x40013404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -8950,7 +8950,7 @@ pub const registers = struct { /// address: 0x40013408 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -8986,7 +8986,7 @@ pub const registers = struct { /// address: 0x4001340c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -9046,7 +9046,7 @@ pub const registers = struct { /// address: 0x40013410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -9103,7 +9103,7 @@ pub const registers = struct { /// address: 0x40013414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -9154,7 +9154,7 @@ pub const registers = struct { /// address: 0x40013418 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9204,7 +9204,7 @@ pub const registers = struct { /// address: 0x40013418 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9240,7 +9240,7 @@ pub const registers = struct { /// address: 0x4001341c /// capture/compare mode register (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9290,7 +9290,7 @@ pub const registers = struct { /// address: 0x4001341c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare 3 /// selection CC3S: u2, @@ -9326,7 +9326,7 @@ pub const registers = struct { /// address: 0x40013420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -9419,7 +9419,7 @@ pub const registers = struct { /// address: 0x40013448 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -9450,7 +9450,7 @@ pub const registers = struct { /// address: 0x4001344c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -9474,7 +9474,7 @@ pub const registers = struct { /// address: 0x40013430 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u8, padding0: u1, @@ -9505,7 +9505,7 @@ pub const registers = struct { /// address: 0x40013444 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -9548,7 +9548,7 @@ pub const registers = struct { /// address: 0x40000000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -9592,7 +9592,7 @@ pub const registers = struct { /// address: 0x40000004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -9631,7 +9631,7 @@ pub const registers = struct { /// address: 0x40000008 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -9667,7 +9667,7 @@ pub const registers = struct { /// address: 0x4000000c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -9724,7 +9724,7 @@ pub const registers = struct { /// address: 0x40000010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -9779,7 +9779,7 @@ pub const registers = struct { /// address: 0x40000014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -9827,7 +9827,7 @@ pub const registers = struct { /// address: 0x40000018 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9877,7 +9877,7 @@ pub const registers = struct { /// address: 0x40000018 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9913,7 +9913,7 @@ pub const registers = struct { /// address: 0x4000001c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9963,7 +9963,7 @@ pub const registers = struct { /// address: 0x4000001c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9999,7 +9999,7 @@ pub const registers = struct { /// address: 0x40000020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -10080,7 +10080,7 @@ pub const registers = struct { /// address: 0x40000048 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -10111,7 +10111,7 @@ pub const registers = struct { /// address: 0x4000004c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -10138,7 +10138,7 @@ pub const registers = struct { /// address: 0x40000400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -10182,7 +10182,7 @@ pub const registers = struct { /// address: 0x40000404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -10221,7 +10221,7 @@ pub const registers = struct { /// address: 0x40000408 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -10257,7 +10257,7 @@ pub const registers = struct { /// address: 0x4000040c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -10314,7 +10314,7 @@ pub const registers = struct { /// address: 0x40000410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -10369,7 +10369,7 @@ pub const registers = struct { /// address: 0x40000414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -10417,7 +10417,7 @@ pub const registers = struct { /// address: 0x40000418 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10467,7 +10467,7 @@ pub const registers = struct { /// address: 0x40000418 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10503,7 +10503,7 @@ pub const registers = struct { /// address: 0x4000041c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -10553,7 +10553,7 @@ pub const registers = struct { /// address: 0x4000041c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -10589,7 +10589,7 @@ pub const registers = struct { /// address: 0x40000420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -10670,7 +10670,7 @@ pub const registers = struct { /// address: 0x40000448 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -10701,7 +10701,7 @@ pub const registers = struct { /// address: 0x4000044c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -10728,7 +10728,7 @@ pub const registers = struct { /// address: 0x40000800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -10772,7 +10772,7 @@ pub const registers = struct { /// address: 0x40000804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -10811,7 +10811,7 @@ pub const registers = struct { /// address: 0x40000808 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -10847,7 +10847,7 @@ pub const registers = struct { /// address: 0x4000080c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -10904,7 +10904,7 @@ pub const registers = struct { /// address: 0x40000810 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -10959,7 +10959,7 @@ pub const registers = struct { /// address: 0x40000814 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -11007,7 +11007,7 @@ pub const registers = struct { /// address: 0x40000818 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11057,7 +11057,7 @@ pub const registers = struct { /// address: 0x40000818 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11093,7 +11093,7 @@ pub const registers = struct { /// address: 0x4000081c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -11143,7 +11143,7 @@ pub const registers = struct { /// address: 0x4000081c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -11179,7 +11179,7 @@ pub const registers = struct { /// address: 0x40000820 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -11260,7 +11260,7 @@ pub const registers = struct { /// address: 0x40000848 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -11291,7 +11291,7 @@ pub const registers = struct { /// address: 0x4000084c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -11318,7 +11318,7 @@ pub const registers = struct { /// address: 0x40000c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -11362,7 +11362,7 @@ pub const registers = struct { /// address: 0x40000c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -11401,7 +11401,7 @@ pub const registers = struct { /// address: 0x40000c08 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -11437,7 +11437,7 @@ pub const registers = struct { /// address: 0x40000c0c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -11494,7 +11494,7 @@ pub const registers = struct { /// address: 0x40000c10 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -11549,7 +11549,7 @@ pub const registers = struct { /// address: 0x40000c14 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -11597,7 +11597,7 @@ pub const registers = struct { /// address: 0x40000c18 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11647,7 +11647,7 @@ pub const registers = struct { /// address: 0x40000c18 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11683,7 +11683,7 @@ pub const registers = struct { /// address: 0x40000c1c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -11733,7 +11733,7 @@ pub const registers = struct { /// address: 0x40000c1c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -11769,7 +11769,7 @@ pub const registers = struct { /// address: 0x40000c20 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -11850,7 +11850,7 @@ pub const registers = struct { /// address: 0x40000c48 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -11881,7 +11881,7 @@ pub const registers = struct { /// address: 0x40000c4c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -11909,7 +11909,7 @@ pub const registers = struct { /// address: 0x40014c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -11951,7 +11951,7 @@ pub const registers = struct { /// address: 0x40014c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -11987,7 +11987,7 @@ pub const registers = struct { /// address: 0x40014c08 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -12023,7 +12023,7 @@ pub const registers = struct { /// address: 0x40014c0c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -12066,7 +12066,7 @@ pub const registers = struct { /// address: 0x40014c10 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -12113,7 +12113,7 @@ pub const registers = struct { /// address: 0x40014c14 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -12157,7 +12157,7 @@ pub const registers = struct { /// address: 0x40014c18 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12203,7 +12203,7 @@ pub const registers = struct { /// address: 0x40014c18 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12239,7 +12239,7 @@ pub const registers = struct { /// address: 0x40014c20 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -12311,7 +12311,7 @@ pub const registers = struct { /// address: 0x40001800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -12353,7 +12353,7 @@ pub const registers = struct { /// address: 0x40001804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12389,7 +12389,7 @@ pub const registers = struct { /// address: 0x40001808 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -12425,7 +12425,7 @@ pub const registers = struct { /// address: 0x4000180c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -12468,7 +12468,7 @@ pub const registers = struct { /// address: 0x40001810 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -12515,7 +12515,7 @@ pub const registers = struct { /// address: 0x40001814 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -12559,7 +12559,7 @@ pub const registers = struct { /// address: 0x40001818 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12605,7 +12605,7 @@ pub const registers = struct { /// address: 0x40001818 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12641,7 +12641,7 @@ pub const registers = struct { /// address: 0x40001820 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -12714,7 +12714,7 @@ pub const registers = struct { /// address: 0x40015000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -12755,7 +12755,7 @@ pub const registers = struct { /// address: 0x40015004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12791,7 +12791,7 @@ pub const registers = struct { /// address: 0x4001500c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -12831,7 +12831,7 @@ pub const registers = struct { /// address: 0x40015010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -12873,7 +12873,7 @@ pub const registers = struct { /// address: 0x40015014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -12914,7 +12914,7 @@ pub const registers = struct { /// address: 0x40015018 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12954,7 +12954,7 @@ pub const registers = struct { /// address: 0x40015018 /// capture/compare mode register (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12991,7 +12991,7 @@ pub const registers = struct { /// address: 0x40015020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -13053,7 +13053,7 @@ pub const registers = struct { /// address: 0x40015400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -13094,7 +13094,7 @@ pub const registers = struct { /// address: 0x40015404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13130,7 +13130,7 @@ pub const registers = struct { /// address: 0x4001540c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -13170,7 +13170,7 @@ pub const registers = struct { /// address: 0x40015410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -13212,7 +13212,7 @@ pub const registers = struct { /// address: 0x40015414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -13253,7 +13253,7 @@ pub const registers = struct { /// address: 0x40015418 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -13293,7 +13293,7 @@ pub const registers = struct { /// address: 0x40015418 /// capture/compare mode register (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -13330,7 +13330,7 @@ pub const registers = struct { /// address: 0x40015420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -13392,7 +13392,7 @@ pub const registers = struct { /// address: 0x40001c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -13433,7 +13433,7 @@ pub const registers = struct { /// address: 0x40001c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13469,7 +13469,7 @@ pub const registers = struct { /// address: 0x40001c0c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -13509,7 +13509,7 @@ pub const registers = struct { /// address: 0x40001c10 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -13551,7 +13551,7 @@ pub const registers = struct { /// address: 0x40001c14 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -13592,7 +13592,7 @@ pub const registers = struct { /// address: 0x40001c18 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -13632,7 +13632,7 @@ pub const registers = struct { /// address: 0x40001c18 /// capture/compare mode register (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -13669,7 +13669,7 @@ pub const registers = struct { /// address: 0x40001c20 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -13731,7 +13731,7 @@ pub const registers = struct { /// address: 0x40002000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -13772,7 +13772,7 @@ pub const registers = struct { /// address: 0x40002004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13808,7 +13808,7 @@ pub const registers = struct { /// address: 0x4000200c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -13848,7 +13848,7 @@ pub const registers = struct { /// address: 0x40002010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -13890,7 +13890,7 @@ pub const registers = struct { /// address: 0x40002014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -13931,7 +13931,7 @@ pub const registers = struct { /// address: 0x40002018 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -13971,7 +13971,7 @@ pub const registers = struct { /// address: 0x40002018 /// capture/compare mode register (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -14008,7 +14008,7 @@ pub const registers = struct { /// address: 0x40002020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -14071,7 +14071,7 @@ pub const registers = struct { /// address: 0x40001000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -14113,7 +14113,7 @@ pub const registers = struct { /// address: 0x40001004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -14149,7 +14149,7 @@ pub const registers = struct { /// address: 0x4000100c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, reserved0: u1, @@ -14188,7 +14188,7 @@ pub const registers = struct { /// address: 0x40001010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, padding0: u1, @@ -14226,7 +14226,7 @@ pub const registers = struct { /// address: 0x40001014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, padding0: u1, @@ -14279,7 +14279,7 @@ pub const registers = struct { /// address: 0x40001400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -14321,7 +14321,7 @@ pub const registers = struct { /// address: 0x40001404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -14357,7 +14357,7 @@ pub const registers = struct { /// address: 0x4000140c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, reserved0: u1, @@ -14396,7 +14396,7 @@ pub const registers = struct { /// address: 0x40001410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, padding0: u1, @@ -14434,7 +14434,7 @@ pub const registers = struct { /// address: 0x40001414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, padding0: u1, @@ -14488,7 +14488,7 @@ pub const registers = struct { /// address: 0x40005400 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral enable PE: u1, /// SMBus mode @@ -14541,7 +14541,7 @@ pub const registers = struct { /// address: 0x40005404 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral clock frequency FREQ: u6, reserved0: u1, @@ -14579,7 +14579,7 @@ pub const registers = struct { /// address: 0x40005408 /// Own address register 1 - pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interface address ADD0: u1, /// Interface address @@ -14614,7 +14614,7 @@ pub const registers = struct { /// address: 0x4000540c /// Own address register 2 - pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Dual addressing mode /// enable ENDUAL: u1, @@ -14652,7 +14652,7 @@ pub const registers = struct { /// address: 0x40005414 /// Status register 1 - pub const SR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Start bit (Master mode) SB: u1, /// Address sent (master mode)/matched @@ -14709,7 +14709,7 @@ pub const registers = struct { /// address: 0x40005418 /// Status register 2 - pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Master/slave MSL: u1, /// Bus busy @@ -14751,7 +14751,7 @@ pub const registers = struct { /// address: 0x4000541c /// Clock control register - pub const CCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR = @intToPtr(*volatile Mmio(32, packed struct { /// Clock control register in Fast/Standard /// mode (Master mode) CCR: u12, @@ -14788,7 +14788,7 @@ pub const registers = struct { /// address: 0x40005800 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral enable PE: u1, /// SMBus mode @@ -14841,7 +14841,7 @@ pub const registers = struct { /// address: 0x40005804 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral clock frequency FREQ: u6, reserved0: u1, @@ -14879,7 +14879,7 @@ pub const registers = struct { /// address: 0x40005808 /// Own address register 1 - pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interface address ADD0: u1, /// Interface address @@ -14914,7 +14914,7 @@ pub const registers = struct { /// address: 0x4000580c /// Own address register 2 - pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Dual addressing mode /// enable ENDUAL: u1, @@ -14952,7 +14952,7 @@ pub const registers = struct { /// address: 0x40005814 /// Status register 1 - pub const SR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Start bit (Master mode) SB: u1, /// Address sent (master mode)/matched @@ -15009,7 +15009,7 @@ pub const registers = struct { /// address: 0x40005818 /// Status register 2 - pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Master/slave MSL: u1, /// Bus busy @@ -15051,7 +15051,7 @@ pub const registers = struct { /// address: 0x4000581c /// Clock control register - pub const CCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR = @intToPtr(*volatile Mmio(32, packed struct { /// Clock control register in Fast/Standard /// mode (Master mode) CCR: u12, @@ -15089,7 +15089,7 @@ pub const registers = struct { /// address: 0x40013000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15141,7 +15141,7 @@ pub const registers = struct { /// address: 0x40013004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15186,7 +15186,7 @@ pub const registers = struct { /// address: 0x40013008 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15235,7 +15235,7 @@ pub const registers = struct { /// address: 0x40013010 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15258,7 +15258,7 @@ pub const registers = struct { /// address: 0x40013014 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15281,7 +15281,7 @@ pub const registers = struct { /// address: 0x40013018 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15304,7 +15304,7 @@ pub const registers = struct { /// address: 0x4001301c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15349,7 +15349,7 @@ pub const registers = struct { /// address: 0x40013020 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15386,7 +15386,7 @@ pub const registers = struct { /// address: 0x40003800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15438,7 +15438,7 @@ pub const registers = struct { /// address: 0x40003804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15483,7 +15483,7 @@ pub const registers = struct { /// address: 0x40003808 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15532,7 +15532,7 @@ pub const registers = struct { /// address: 0x40003810 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15555,7 +15555,7 @@ pub const registers = struct { /// address: 0x40003814 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15578,7 +15578,7 @@ pub const registers = struct { /// address: 0x40003818 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15601,7 +15601,7 @@ pub const registers = struct { /// address: 0x4000381c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15646,7 +15646,7 @@ pub const registers = struct { /// address: 0x40003820 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15683,7 +15683,7 @@ pub const registers = struct { /// address: 0x40003c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15735,7 +15735,7 @@ pub const registers = struct { /// address: 0x40003c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15780,7 +15780,7 @@ pub const registers = struct { /// address: 0x40003c08 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15829,7 +15829,7 @@ pub const registers = struct { /// address: 0x40003c10 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15852,7 +15852,7 @@ pub const registers = struct { /// address: 0x40003c14 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15875,7 +15875,7 @@ pub const registers = struct { /// address: 0x40003c18 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15898,7 +15898,7 @@ pub const registers = struct { /// address: 0x40003c1c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15943,7 +15943,7 @@ pub const registers = struct { /// address: 0x40003c20 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15982,7 +15982,7 @@ pub const registers = struct { /// address: 0x40013800 /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -16035,7 +16035,7 @@ pub const registers = struct { /// address: 0x40013808 /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -16060,7 +16060,7 @@ pub const registers = struct { /// address: 0x4001380c /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Send break SBK: u1, /// Receiver wakeup @@ -16112,7 +16112,7 @@ pub const registers = struct { /// address: 0x40013810 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Address of the USART node ADD: u4, reserved0: u1, @@ -16155,7 +16155,7 @@ pub const registers = struct { /// address: 0x40013814 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -16204,7 +16204,7 @@ pub const registers = struct { /// address: 0x40013818 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -16232,7 +16232,7 @@ pub const registers = struct { /// address: 0x40004400 /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -16285,7 +16285,7 @@ pub const registers = struct { /// address: 0x40004408 /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -16310,7 +16310,7 @@ pub const registers = struct { /// address: 0x4000440c /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Send break SBK: u1, /// Receiver wakeup @@ -16362,7 +16362,7 @@ pub const registers = struct { /// address: 0x40004410 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Address of the USART node ADD: u4, reserved0: u1, @@ -16405,7 +16405,7 @@ pub const registers = struct { /// address: 0x40004414 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -16454,7 +16454,7 @@ pub const registers = struct { /// address: 0x40004418 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -16482,7 +16482,7 @@ pub const registers = struct { /// address: 0x40004800 /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -16535,7 +16535,7 @@ pub const registers = struct { /// address: 0x40004808 /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -16560,7 +16560,7 @@ pub const registers = struct { /// address: 0x4000480c /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Send break SBK: u1, /// Receiver wakeup @@ -16612,7 +16612,7 @@ pub const registers = struct { /// address: 0x40004810 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Address of the USART node ADD: u4, reserved0: u1, @@ -16655,7 +16655,7 @@ pub const registers = struct { /// address: 0x40004814 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -16704,7 +16704,7 @@ pub const registers = struct { /// address: 0x40004818 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -16733,7 +16733,7 @@ pub const registers = struct { /// address: 0x40012400 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog flag AWD: u1, /// Regular channel end of @@ -16778,7 +16778,7 @@ pub const registers = struct { /// address: 0x40012404 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog channel select /// bits AWDCH: u5, @@ -16829,7 +16829,7 @@ pub const registers = struct { /// address: 0x40012408 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// A/D converter ON / OFF ADON: u1, /// Continuous conversion @@ -16882,7 +16882,7 @@ pub const registers = struct { /// address: 0x4001240c /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 10 sample time /// selection SMP10: u3, @@ -16919,7 +16919,7 @@ pub const registers = struct { /// address: 0x40012410 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 0 sample time /// selection SMP0: u3, @@ -16957,7 +16957,7 @@ pub const registers = struct { /// address: 0x40012414 /// injected channel data offset register /// x - pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET1: u12, @@ -16986,7 +16986,7 @@ pub const registers = struct { /// address: 0x40012418 /// injected channel data offset register /// x - pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET2: u12, @@ -17015,7 +17015,7 @@ pub const registers = struct { /// address: 0x4001241c /// injected channel data offset register /// x - pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET3: u12, @@ -17044,7 +17044,7 @@ pub const registers = struct { /// address: 0x40012420 /// injected channel data offset register /// x - pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET4: u12, @@ -17073,7 +17073,7 @@ pub const registers = struct { /// address: 0x40012424 /// watchdog higher threshold /// register - pub const HTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog higher /// threshold HT: u12, @@ -17102,7 +17102,7 @@ pub const registers = struct { /// address: 0x40012428 /// watchdog lower threshold /// register - pub const LTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog lower /// threshold LT: u12, @@ -17130,7 +17130,7 @@ pub const registers = struct { /// address: 0x4001242c /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// 13th conversion in regular /// sequence SQ13: u5, @@ -17158,7 +17158,7 @@ pub const registers = struct { /// address: 0x40012430 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// 7th conversion in regular /// sequence SQ7: u5, @@ -17183,7 +17183,7 @@ pub const registers = struct { /// address: 0x40012434 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in regular /// sequence SQ1: u5, @@ -17208,7 +17208,7 @@ pub const registers = struct { /// address: 0x40012438 /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in injected /// sequence JSQ1: u5, @@ -17237,7 +17237,7 @@ pub const registers = struct { /// address: 0x4001243c /// injected data register x - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17260,7 +17260,7 @@ pub const registers = struct { /// address: 0x40012440 /// injected data register x - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17283,7 +17283,7 @@ pub const registers = struct { /// address: 0x40012444 /// injected data register x - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17306,7 +17306,7 @@ pub const registers = struct { /// address: 0x40012448 /// injected data register x - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17329,7 +17329,7 @@ pub const registers = struct { /// address: 0x4001244c /// regular data register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// Regular data DATA: u16, /// ADC2 data @@ -17342,7 +17342,7 @@ pub const registers = struct { /// address: 0x40012800 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog flag AWD: u1, /// Regular channel end of @@ -17387,7 +17387,7 @@ pub const registers = struct { /// address: 0x40012804 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog channel select /// bits AWDCH: u5, @@ -17440,7 +17440,7 @@ pub const registers = struct { /// address: 0x40012808 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// A/D converter ON / OFF ADON: u1, /// Continuous conversion @@ -17493,7 +17493,7 @@ pub const registers = struct { /// address: 0x4001280c /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 10 sample time /// selection SMP10: u3, @@ -17530,7 +17530,7 @@ pub const registers = struct { /// address: 0x40012810 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 0 sample time /// selection SMP0: u3, @@ -17568,7 +17568,7 @@ pub const registers = struct { /// address: 0x40012814 /// injected channel data offset register /// x - pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET1: u12, @@ -17597,7 +17597,7 @@ pub const registers = struct { /// address: 0x40012818 /// injected channel data offset register /// x - pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET2: u12, @@ -17626,7 +17626,7 @@ pub const registers = struct { /// address: 0x4001281c /// injected channel data offset register /// x - pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET3: u12, @@ -17655,7 +17655,7 @@ pub const registers = struct { /// address: 0x40012820 /// injected channel data offset register /// x - pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET4: u12, @@ -17684,7 +17684,7 @@ pub const registers = struct { /// address: 0x40012824 /// watchdog higher threshold /// register - pub const HTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog higher /// threshold HT: u12, @@ -17713,7 +17713,7 @@ pub const registers = struct { /// address: 0x40012828 /// watchdog lower threshold /// register - pub const LTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog lower /// threshold LT: u12, @@ -17741,7 +17741,7 @@ pub const registers = struct { /// address: 0x4001282c /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// 13th conversion in regular /// sequence SQ13: u5, @@ -17769,7 +17769,7 @@ pub const registers = struct { /// address: 0x40012830 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// 7th conversion in regular /// sequence SQ7: u5, @@ -17794,7 +17794,7 @@ pub const registers = struct { /// address: 0x40012834 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in regular /// sequence SQ1: u5, @@ -17819,7 +17819,7 @@ pub const registers = struct { /// address: 0x40012838 /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in injected /// sequence JSQ1: u5, @@ -17848,7 +17848,7 @@ pub const registers = struct { /// address: 0x4001283c /// injected data register x - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17871,7 +17871,7 @@ pub const registers = struct { /// address: 0x40012840 /// injected data register x - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17894,7 +17894,7 @@ pub const registers = struct { /// address: 0x40012844 /// injected data register x - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17917,7 +17917,7 @@ pub const registers = struct { /// address: 0x40012848 /// injected data register x - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -17940,7 +17940,7 @@ pub const registers = struct { /// address: 0x4001284c /// regular data register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// Regular data DATA: u16, padding0: u1, @@ -17966,7 +17966,7 @@ pub const registers = struct { /// address: 0x40013c00 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog flag AWD: u1, /// Regular channel end of @@ -18011,7 +18011,7 @@ pub const registers = struct { /// address: 0x40013c04 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog channel select /// bits AWDCH: u5, @@ -18064,7 +18064,7 @@ pub const registers = struct { /// address: 0x40013c08 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// A/D converter ON / OFF ADON: u1, /// Continuous conversion @@ -18117,7 +18117,7 @@ pub const registers = struct { /// address: 0x40013c0c /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 10 sample time /// selection SMP10: u3, @@ -18154,7 +18154,7 @@ pub const registers = struct { /// address: 0x40013c10 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 0 sample time /// selection SMP0: u3, @@ -18192,7 +18192,7 @@ pub const registers = struct { /// address: 0x40013c14 /// injected channel data offset register /// x - pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET1: u12, @@ -18221,7 +18221,7 @@ pub const registers = struct { /// address: 0x40013c18 /// injected channel data offset register /// x - pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET2: u12, @@ -18250,7 +18250,7 @@ pub const registers = struct { /// address: 0x40013c1c /// injected channel data offset register /// x - pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET3: u12, @@ -18279,7 +18279,7 @@ pub const registers = struct { /// address: 0x40013c20 /// injected channel data offset register /// x - pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JOFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Data offset for injected channel /// x JOFFSET4: u12, @@ -18308,7 +18308,7 @@ pub const registers = struct { /// address: 0x40013c24 /// watchdog higher threshold /// register - pub const HTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog higher /// threshold HT: u12, @@ -18337,7 +18337,7 @@ pub const registers = struct { /// address: 0x40013c28 /// watchdog lower threshold /// register - pub const LTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LTR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog watchdog lower /// threshold LT: u12, @@ -18365,7 +18365,7 @@ pub const registers = struct { /// address: 0x40013c2c /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// 13th conversion in regular /// sequence SQ13: u5, @@ -18393,7 +18393,7 @@ pub const registers = struct { /// address: 0x40013c30 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// 7th conversion in regular /// sequence SQ7: u5, @@ -18418,7 +18418,7 @@ pub const registers = struct { /// address: 0x40013c34 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in regular /// sequence SQ1: u5, @@ -18443,7 +18443,7 @@ pub const registers = struct { /// address: 0x40013c38 /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// 1st conversion in injected /// sequence JSQ1: u5, @@ -18472,7 +18472,7 @@ pub const registers = struct { /// address: 0x40013c3c /// injected data register x - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -18495,7 +18495,7 @@ pub const registers = struct { /// address: 0x40013c40 /// injected data register x - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -18518,7 +18518,7 @@ pub const registers = struct { /// address: 0x40013c44 /// injected data register x - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -18541,7 +18541,7 @@ pub const registers = struct { /// address: 0x40013c48 /// injected data register x - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Injected data JDATA: u16, padding0: u1, @@ -18564,7 +18564,7 @@ pub const registers = struct { /// address: 0x40013c4c /// regular data register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// Regular data DATA: u16, padding0: u1, @@ -18591,7 +18591,7 @@ pub const registers = struct { /// address: 0x40006400 /// CAN_MCR - pub const CAN_MCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_MCR = @intToPtr(*volatile Mmio(32, packed struct { /// INRQ INRQ: u1, /// SLEEP @@ -18638,7 +18638,7 @@ pub const registers = struct { /// address: 0x40006404 /// CAN_MSR - pub const CAN_MSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_MSR = @intToPtr(*volatile Mmio(32, packed struct { /// INAK INAK: u1, /// SLAK @@ -18684,7 +18684,7 @@ pub const registers = struct { /// address: 0x40006408 /// CAN_TSR - pub const CAN_TSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TSR = @intToPtr(*volatile Mmio(32, packed struct { /// RQCP0 RQCP0: u1, /// TXOK0 @@ -18748,7 +18748,7 @@ pub const registers = struct { /// address: 0x4000640c /// CAN_RF0R - pub const CAN_RF0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RF0R = @intToPtr(*volatile Mmio(32, packed struct { /// FMP0 FMP0: u2, reserved0: u1, @@ -18788,7 +18788,7 @@ pub const registers = struct { /// address: 0x40006410 /// CAN_RF1R - pub const CAN_RF1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RF1R = @intToPtr(*volatile Mmio(32, packed struct { /// FMP1 FMP1: u2, reserved0: u1, @@ -18828,7 +18828,7 @@ pub const registers = struct { /// address: 0x40006414 /// CAN_IER - pub const CAN_IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_IER = @intToPtr(*volatile Mmio(32, packed struct { /// TMEIE TMEIE: u1, /// FMPIE0 @@ -18879,7 +18879,7 @@ pub const registers = struct { /// address: 0x40006418 /// CAN_ESR - pub const CAN_ESR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_ESR = @intToPtr(*volatile Mmio(32, packed struct { /// EWGF EWGF: u1, /// EPVF @@ -18906,7 +18906,7 @@ pub const registers = struct { /// address: 0x4000641c /// CAN_BTR - pub const CAN_BTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_BTR = @intToPtr(*volatile Mmio(32, packed struct { /// BRP BRP: u10, reserved0: u1, @@ -18934,7 +18934,7 @@ pub const registers = struct { /// address: 0x40006580 /// CAN_TI0R - pub const CAN_TI0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TI0R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -18949,7 +18949,7 @@ pub const registers = struct { /// address: 0x40006584 /// CAN_TDT0R - pub const CAN_TDT0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDT0R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -18971,7 +18971,7 @@ pub const registers = struct { /// address: 0x40006588 /// CAN_TDL0R - pub const CAN_TDL0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDL0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -18984,7 +18984,7 @@ pub const registers = struct { /// address: 0x4000658c /// CAN_TDH0R - pub const CAN_TDH0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDH0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -18997,7 +18997,7 @@ pub const registers = struct { /// address: 0x40006590 /// CAN_TI1R - pub const CAN_TI1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TI1R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -19012,7 +19012,7 @@ pub const registers = struct { /// address: 0x40006594 /// CAN_TDT1R - pub const CAN_TDT1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDT1R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -19034,7 +19034,7 @@ pub const registers = struct { /// address: 0x40006598 /// CAN_TDL1R - pub const CAN_TDL1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDL1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -19047,7 +19047,7 @@ pub const registers = struct { /// address: 0x4000659c /// CAN_TDH1R - pub const CAN_TDH1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDH1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -19060,7 +19060,7 @@ pub const registers = struct { /// address: 0x400065a0 /// CAN_TI2R - pub const CAN_TI2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TI2R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -19075,7 +19075,7 @@ pub const registers = struct { /// address: 0x400065a4 /// CAN_TDT2R - pub const CAN_TDT2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDT2R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -19097,7 +19097,7 @@ pub const registers = struct { /// address: 0x400065a8 /// CAN_TDL2R - pub const CAN_TDL2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDL2R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -19110,7 +19110,7 @@ pub const registers = struct { /// address: 0x400065ac /// CAN_TDH2R - pub const CAN_TDH2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_TDH2R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -19123,7 +19123,7 @@ pub const registers = struct { /// address: 0x400065b0 /// CAN_RI0R - pub const CAN_RI0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RI0R = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// RTR RTR: u1, @@ -19137,7 +19137,7 @@ pub const registers = struct { /// address: 0x400065b4 /// CAN_RDT0R - pub const CAN_RDT0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDT0R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -19152,7 +19152,7 @@ pub const registers = struct { /// address: 0x400065b8 /// CAN_RDL0R - pub const CAN_RDL0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDL0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -19165,7 +19165,7 @@ pub const registers = struct { /// address: 0x400065bc /// CAN_RDH0R - pub const CAN_RDH0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDH0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -19178,7 +19178,7 @@ pub const registers = struct { /// address: 0x400065c0 /// CAN_RI1R - pub const CAN_RI1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RI1R = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// RTR RTR: u1, @@ -19192,7 +19192,7 @@ pub const registers = struct { /// address: 0x400065c4 /// CAN_RDT1R - pub const CAN_RDT1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDT1R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -19207,7 +19207,7 @@ pub const registers = struct { /// address: 0x400065c8 /// CAN_RDL1R - pub const CAN_RDL1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDL1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -19220,7 +19220,7 @@ pub const registers = struct { /// address: 0x400065cc /// CAN_RDH1R - pub const CAN_RDH1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_RDH1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -19233,7 +19233,7 @@ pub const registers = struct { /// address: 0x40006600 /// CAN_FMR - pub const CAN_FMR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_FMR = @intToPtr(*volatile Mmio(32, packed struct { /// FINIT FINIT: u1, padding0: u1, @@ -19271,7 +19271,7 @@ pub const registers = struct { /// address: 0x40006604 /// CAN_FM1R - pub const CAN_FM1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_FM1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter mode FBM0: u1, /// Filter mode @@ -19322,7 +19322,7 @@ pub const registers = struct { /// address: 0x4000660c /// CAN_FS1R - pub const CAN_FS1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_FS1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter scale configuration FSC0: u1, /// Filter scale configuration @@ -19373,7 +19373,7 @@ pub const registers = struct { /// address: 0x40006614 /// CAN_FFA1R - pub const CAN_FFA1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_FFA1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter FIFO assignment for filter /// 0 FFA0: u1, @@ -19438,7 +19438,7 @@ pub const registers = struct { /// address: 0x4000661c /// CAN_FA1R - pub const CAN_FA1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CAN_FA1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter active FACT0: u1, /// Filter active @@ -19489,7 +19489,7 @@ pub const registers = struct { /// address: 0x40006640 /// Filter bank 0 register 1 - pub const F0R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F0R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19558,7 +19558,7 @@ pub const registers = struct { /// address: 0x40006644 /// Filter bank 0 register 2 - pub const F0R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F0R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19627,7 +19627,7 @@ pub const registers = struct { /// address: 0x40006648 /// Filter bank 1 register 1 - pub const F1R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F1R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19696,7 +19696,7 @@ pub const registers = struct { /// address: 0x4000664c /// Filter bank 1 register 2 - pub const F1R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F1R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19765,7 +19765,7 @@ pub const registers = struct { /// address: 0x40006650 /// Filter bank 2 register 1 - pub const F2R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F2R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19834,7 +19834,7 @@ pub const registers = struct { /// address: 0x40006654 /// Filter bank 2 register 2 - pub const F2R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F2R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19903,7 +19903,7 @@ pub const registers = struct { /// address: 0x40006658 /// Filter bank 3 register 1 - pub const F3R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F3R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19972,7 +19972,7 @@ pub const registers = struct { /// address: 0x4000665c /// Filter bank 3 register 2 - pub const F3R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F3R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20041,7 +20041,7 @@ pub const registers = struct { /// address: 0x40006660 /// Filter bank 4 register 1 - pub const F4R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F4R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20110,7 +20110,7 @@ pub const registers = struct { /// address: 0x40006664 /// Filter bank 4 register 2 - pub const F4R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F4R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20179,7 +20179,7 @@ pub const registers = struct { /// address: 0x40006668 /// Filter bank 5 register 1 - pub const F5R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F5R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20248,7 +20248,7 @@ pub const registers = struct { /// address: 0x4000666c /// Filter bank 5 register 2 - pub const F5R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F5R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20317,7 +20317,7 @@ pub const registers = struct { /// address: 0x40006670 /// Filter bank 6 register 1 - pub const F6R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F6R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20386,7 +20386,7 @@ pub const registers = struct { /// address: 0x40006674 /// Filter bank 6 register 2 - pub const F6R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F6R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20455,7 +20455,7 @@ pub const registers = struct { /// address: 0x40006678 /// Filter bank 7 register 1 - pub const F7R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F7R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20524,7 +20524,7 @@ pub const registers = struct { /// address: 0x4000667c /// Filter bank 7 register 2 - pub const F7R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F7R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20593,7 +20593,7 @@ pub const registers = struct { /// address: 0x40006680 /// Filter bank 8 register 1 - pub const F8R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F8R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20662,7 +20662,7 @@ pub const registers = struct { /// address: 0x40006684 /// Filter bank 8 register 2 - pub const F8R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F8R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20731,7 +20731,7 @@ pub const registers = struct { /// address: 0x40006688 /// Filter bank 9 register 1 - pub const F9R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F9R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20800,7 +20800,7 @@ pub const registers = struct { /// address: 0x4000668c /// Filter bank 9 register 2 - pub const F9R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F9R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20869,7 +20869,7 @@ pub const registers = struct { /// address: 0x40006690 /// Filter bank 10 register 1 - pub const F10R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F10R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20938,7 +20938,7 @@ pub const registers = struct { /// address: 0x40006694 /// Filter bank 10 register 2 - pub const F10R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F10R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21007,7 +21007,7 @@ pub const registers = struct { /// address: 0x40006698 /// Filter bank 11 register 1 - pub const F11R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F11R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21076,7 +21076,7 @@ pub const registers = struct { /// address: 0x4000669c /// Filter bank 11 register 2 - pub const F11R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F11R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21145,7 +21145,7 @@ pub const registers = struct { /// address: 0x400066a0 /// Filter bank 4 register 1 - pub const F12R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F12R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21214,7 +21214,7 @@ pub const registers = struct { /// address: 0x400066a4 /// Filter bank 12 register 2 - pub const F12R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F12R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21283,7 +21283,7 @@ pub const registers = struct { /// address: 0x400066a8 /// Filter bank 13 register 1 - pub const F13R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F13R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21352,7 +21352,7 @@ pub const registers = struct { /// address: 0x400066ac /// Filter bank 13 register 2 - pub const F13R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F13R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21425,7 +21425,7 @@ pub const registers = struct { /// address: 0x40007400 /// Control register (DAC_CR) - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 enable EN1: u1, /// DAC channel1 output buffer @@ -21475,7 +21475,7 @@ pub const registers = struct { /// address: 0x40007404 /// DAC software trigger register /// (DAC_SWTRIGR) - pub const SWTRIGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SWTRIGR = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 software /// trigger SWTRIG1: u1, @@ -21517,7 +21517,7 @@ pub const registers = struct { /// address: 0x40007408 /// DAC channel1 12-bit right-aligned data /// holding register(DAC_DHR12R1) - pub const DHR12R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12R1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 12-bit right-aligned /// data DACC1DHR: u12, @@ -21546,7 +21546,7 @@ pub const registers = struct { /// address: 0x4000740c /// DAC channel1 12-bit left aligned data /// holding register (DAC_DHR12L1) - pub const DHR12L1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12L1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -21575,7 +21575,7 @@ pub const registers = struct { /// address: 0x40007410 /// DAC channel1 8-bit right aligned data /// holding register (DAC_DHR8R1) - pub const DHR8R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8R1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 8-bit right-aligned /// data DACC1DHR: u8, @@ -21608,7 +21608,7 @@ pub const registers = struct { /// address: 0x40007414 /// DAC channel2 12-bit right aligned data /// holding register (DAC_DHR12R2) - pub const DHR12R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12R2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 12-bit right-aligned /// data DACC2DHR: u12, @@ -21637,7 +21637,7 @@ pub const registers = struct { /// address: 0x40007418 /// DAC channel2 12-bit left aligned data /// holding register (DAC_DHR12L2) - pub const DHR12L2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12L2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -21666,7 +21666,7 @@ pub const registers = struct { /// address: 0x4000741c /// DAC channel2 8-bit right-aligned data /// holding register (DAC_DHR8R2) - pub const DHR8R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8R2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 8-bit right-aligned /// data DACC2DHR: u8, @@ -21700,7 +21700,7 @@ pub const registers = struct { /// Dual DAC 12-bit right-aligned data holding /// register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 /// Reserved - pub const DHR12RD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12RD = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 12-bit right-aligned /// data DACC1DHR: u12, @@ -21721,7 +21721,7 @@ pub const registers = struct { /// DUAL DAC 12-bit left aligned data holding /// register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 /// Reserved - pub const DHR12LD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12LD = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -21741,7 +21741,7 @@ pub const registers = struct { /// address: 0x40007428 /// DUAL DAC 8-bit right aligned data holding /// register (DAC_DHR8RD), Bits 31:16 Reserved - pub const DHR8RD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8RD = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 8-bit right-aligned /// data DACC1DHR: u8, @@ -21769,7 +21769,7 @@ pub const registers = struct { /// address: 0x4000742c /// DAC channel1 data output register /// (DAC_DOR1) - pub const DOR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DOR1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 data output DACC1DOR: u12, padding0: u1, @@ -21797,7 +21797,7 @@ pub const registers = struct { /// address: 0x40007430 /// DAC channel2 data output register /// (DAC_DOR2) - pub const DOR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DOR2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 data output DACC2DOR: u12, padding0: u1, @@ -21828,7 +21828,7 @@ pub const registers = struct { /// address: 0xe0042000 /// DBGMCU_IDCODE - pub const IDCODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDCODE = @intToPtr(*volatile Mmio(32, packed struct { /// DEV_ID DEV_ID: u12, reserved0: u1, @@ -21841,7 +21841,7 @@ pub const registers = struct { /// address: 0xe0042004 /// DBGMCU_CR - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// DBG_SLEEP DBG_SLEEP: u1, /// DBG_STOP @@ -21901,7 +21901,7 @@ pub const registers = struct { /// address: 0x40004c00 /// UART4_SR - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -21953,7 +21953,7 @@ pub const registers = struct { /// address: 0x40004c08 /// UART4_BRR - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// DIV_Fraction DIV_Fraction: u4, /// DIV_Mantissa @@ -21978,7 +21978,7 @@ pub const registers = struct { /// address: 0x40004c0c /// UART4_CR1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Send break SBK: u1, /// Receiver wakeup @@ -22030,7 +22030,7 @@ pub const registers = struct { /// address: 0x40004c10 /// UART4_CR2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Address of the USART node ADD: u4, reserved0: u1, @@ -22069,7 +22069,7 @@ pub const registers = struct { /// address: 0x40004c14 /// UART4_CR3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -22117,7 +22117,7 @@ pub const registers = struct { /// address: 0x40005000 /// UART4_SR - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// PE PE: u1, /// FE @@ -22167,7 +22167,7 @@ pub const registers = struct { /// address: 0x40005008 /// UART4_BRR - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// DIV_Fraction DIV_Fraction: u4, /// DIV_Mantissa @@ -22192,7 +22192,7 @@ pub const registers = struct { /// address: 0x4000500c /// UART4_CR1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// SBK SBK: u1, /// RWU @@ -22243,7 +22243,7 @@ pub const registers = struct { /// address: 0x40005010 /// UART4_CR2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ADD ADD: u4, reserved0: u1, @@ -22281,7 +22281,7 @@ pub const registers = struct { /// address: 0x40005014 /// UART4_CR3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -22335,7 +22335,7 @@ pub const registers = struct { /// address: 0x40023008 /// Control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Reset bit RESET: u1, padding0: u1, @@ -22377,7 +22377,7 @@ pub const registers = struct { /// address: 0x40022000 /// Flash access control register - pub const ACR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ACR = @intToPtr(*volatile Mmio(32, packed struct { /// Latency LATENCY: u3, /// Flash half cycle access @@ -22417,21 +22417,21 @@ pub const registers = struct { /// address: 0x40022004 /// Flash key register - pub const KEYR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const KEYR = @intToPtr(*volatile Mmio(32, packed struct { /// FPEC key KEY: u32, }), base_address + 0x4); /// address: 0x40022008 /// Flash option key register - pub const OPTKEYR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OPTKEYR = @intToPtr(*volatile Mmio(32, packed struct { /// Option byte key OPTKEY: u32, }), base_address + 0x8); /// address: 0x4002200c /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Busy BSY: u1, reserved0: u1, @@ -22472,7 +22472,7 @@ pub const registers = struct { /// address: 0x40022010 /// Control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Programming PG: u1, /// Page Erase @@ -22520,14 +22520,14 @@ pub const registers = struct { /// address: 0x40022014 /// Flash address register - pub const AR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AR = @intToPtr(*volatile Mmio(32, packed struct { /// Flash Address FAR: u32, }), base_address + 0x14); /// address: 0x4002201c /// Option byte register - pub const OBR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OBR = @intToPtr(*volatile Mmio(32, packed struct { /// Option byte error OPTERR: u1, /// Read protection @@ -22557,7 +22557,7 @@ pub const registers = struct { /// address: 0x40022020 /// Write protection register - pub const WRPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const WRPR = @intToPtr(*volatile Mmio(32, packed struct { /// Write protect WRP: u32, }), base_address + 0x20); @@ -22570,7 +22570,7 @@ pub const registers = struct { /// address: 0xe000e004 /// Interrupt Controller Type /// Register - pub const ICTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICTR = @intToPtr(*volatile Mmio(32, packed struct { /// Total number of interrupt lines in /// groups INTLINESNUM: u4, @@ -22607,7 +22607,7 @@ pub const registers = struct { /// address: 0xe000ef00 /// Software Triggered Interrupt /// Register - pub const STIR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STIR = @intToPtr(*volatile Mmio(32, packed struct { /// interrupt to be triggered INTID: u9, padding0: u1, @@ -22637,14 +22637,14 @@ pub const registers = struct { /// address: 0xe000e100 /// Interrupt Set-Enable Register - pub const ISER0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISER0 = @intToPtr(*volatile Mmio(32, packed struct { /// SETENA SETENA: u32, }), base_address + 0x100); /// address: 0xe000e104 /// Interrupt Set-Enable Register - pub const ISER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISER1 = @intToPtr(*volatile Mmio(32, packed struct { /// SETENA SETENA: u32, }), base_address + 0x104); @@ -22652,7 +22652,7 @@ pub const registers = struct { /// address: 0xe000e180 /// Interrupt Clear-Enable /// Register - pub const ICER0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICER0 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRENA CLRENA: u32, }), base_address + 0x180); @@ -22660,21 +22660,21 @@ pub const registers = struct { /// address: 0xe000e184 /// Interrupt Clear-Enable /// Register - pub const ICER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICER1 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRENA CLRENA: u32, }), base_address + 0x184); /// address: 0xe000e200 /// Interrupt Set-Pending Register - pub const ISPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// SETPEND SETPEND: u32, }), base_address + 0x200); /// address: 0xe000e204 /// Interrupt Set-Pending Register - pub const ISPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// SETPEND SETPEND: u32, }), base_address + 0x204); @@ -22682,7 +22682,7 @@ pub const registers = struct { /// address: 0xe000e280 /// Interrupt Clear-Pending /// Register - pub const ICPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRPEND CLRPEND: u32, }), base_address + 0x280); @@ -22690,28 +22690,28 @@ pub const registers = struct { /// address: 0xe000e284 /// Interrupt Clear-Pending /// Register - pub const ICPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRPEND CLRPEND: u32, }), base_address + 0x284); /// address: 0xe000e300 /// Interrupt Active Bit Register - pub const IABR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IABR0 = @intToPtr(*volatile Mmio(32, packed struct { /// ACTIVE ACTIVE: u32, }), base_address + 0x300); /// address: 0xe000e304 /// Interrupt Active Bit Register - pub const IABR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IABR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ACTIVE ACTIVE: u32, }), base_address + 0x304); /// address: 0xe000e400 /// Interrupt Priority Register - pub const IPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22724,7 +22724,7 @@ pub const registers = struct { /// address: 0xe000e404 /// Interrupt Priority Register - pub const IPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22737,7 +22737,7 @@ pub const registers = struct { /// address: 0xe000e408 /// Interrupt Priority Register - pub const IPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22750,7 +22750,7 @@ pub const registers = struct { /// address: 0xe000e40c /// Interrupt Priority Register - pub const IPR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR3 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22763,7 +22763,7 @@ pub const registers = struct { /// address: 0xe000e410 /// Interrupt Priority Register - pub const IPR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR4 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22776,7 +22776,7 @@ pub const registers = struct { /// address: 0xe000e414 /// Interrupt Priority Register - pub const IPR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR5 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22789,7 +22789,7 @@ pub const registers = struct { /// address: 0xe000e418 /// Interrupt Priority Register - pub const IPR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR6 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22802,7 +22802,7 @@ pub const registers = struct { /// address: 0xe000e41c /// Interrupt Priority Register - pub const IPR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR7 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22815,7 +22815,7 @@ pub const registers = struct { /// address: 0xe000e420 /// Interrupt Priority Register - pub const IPR8 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR8 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22828,7 +22828,7 @@ pub const registers = struct { /// address: 0xe000e424 /// Interrupt Priority Register - pub const IPR9 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR9 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22841,7 +22841,7 @@ pub const registers = struct { /// address: 0xe000e428 /// Interrupt Priority Register - pub const IPR10 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR10 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22854,7 +22854,7 @@ pub const registers = struct { /// address: 0xe000e42c /// Interrupt Priority Register - pub const IPR11 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR11 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22867,7 +22867,7 @@ pub const registers = struct { /// address: 0xe000e430 /// Interrupt Priority Register - pub const IPR12 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR12 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22880,7 +22880,7 @@ pub const registers = struct { /// address: 0xe000e434 /// Interrupt Priority Register - pub const IPR13 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR13 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22893,7 +22893,7 @@ pub const registers = struct { /// address: 0xe000e438 /// Interrupt Priority Register - pub const IPR14 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR14 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -22911,7 +22911,7 @@ pub const registers = struct { /// address: 0x40005c00 /// endpoint 0 register - pub const EP0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP0R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -22959,7 +22959,7 @@ pub const registers = struct { /// address: 0x40005c04 /// endpoint 1 register - pub const EP1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP1R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23007,7 +23007,7 @@ pub const registers = struct { /// address: 0x40005c08 /// endpoint 2 register - pub const EP2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP2R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23055,7 +23055,7 @@ pub const registers = struct { /// address: 0x40005c0c /// endpoint 3 register - pub const EP3R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP3R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23103,7 +23103,7 @@ pub const registers = struct { /// address: 0x40005c10 /// endpoint 4 register - pub const EP4R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP4R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23151,7 +23151,7 @@ pub const registers = struct { /// address: 0x40005c14 /// endpoint 5 register - pub const EP5R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP5R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23199,7 +23199,7 @@ pub const registers = struct { /// address: 0x40005c18 /// endpoint 6 register - pub const EP6R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP6R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23247,7 +23247,7 @@ pub const registers = struct { /// address: 0x40005c1c /// endpoint 7 register - pub const EP7R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EP7R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -23295,7 +23295,7 @@ pub const registers = struct { /// address: 0x40005c40 /// control register - pub const CNTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNTR = @intToPtr(*volatile Mmio(32, packed struct { /// Force USB Reset FRES: u1, /// Power down @@ -23350,7 +23350,7 @@ pub const registers = struct { /// address: 0x40005c44 /// interrupt status register - pub const ISTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISTR = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint Identifier EP_ID: u4, /// Direction of transaction @@ -23395,7 +23395,7 @@ pub const registers = struct { /// address: 0x40005c48 /// frame number register - pub const FNR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FNR = @intToPtr(*volatile Mmio(32, packed struct { /// Frame number FN: u11, /// Lost SOF @@ -23426,7 +23426,7 @@ pub const registers = struct { /// address: 0x40005c4c /// device address - pub const DADDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DADDR = @intToPtr(*volatile Mmio(32, packed struct { /// Device address ADD: u7, /// Enable function diff --git a/src/modules/chips/stm32f303/registers.zig b/src/modules/chips/stm32f303/registers.zig index f5a994a..64ff216 100644 --- a/src/modules/chips/stm32f303/registers.zig +++ b/src/modules/chips/stm32f303/registers.zig @@ -3,7 +3,7 @@ // device: STM32F303 // cpu: CM4 -pub const VectorTable = struct { +pub const VectorTable = extern struct { initial_stack_pointer: u32, Reset: InterruptVector = unhandled, NMI: InterruptVector = unhandled, @@ -208,7 +208,7 @@ pub const registers = struct { /// address: 0x48000000 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -261,7 +261,7 @@ pub const registers = struct { /// address: 0x48000004 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OT0: u1, @@ -331,7 +331,7 @@ pub const registers = struct { /// address: 0x48000008 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -385,7 +385,7 @@ pub const registers = struct { /// address: 0x4800000c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -438,7 +438,7 @@ pub const registers = struct { /// address: 0x48000010 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -507,7 +507,7 @@ pub const registers = struct { /// address: 0x48000014 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -577,7 +577,7 @@ pub const registers = struct { /// address: 0x48000018 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -679,7 +679,7 @@ pub const registers = struct { /// address: 0x4800001c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -750,7 +750,7 @@ pub const registers = struct { /// address: 0x48000020 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -780,7 +780,7 @@ pub const registers = struct { /// address: 0x48000024 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -809,7 +809,7 @@ pub const registers = struct { /// address: 0x48000028 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -866,7 +866,7 @@ pub const registers = struct { /// address: 0x48000400 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -919,7 +919,7 @@ pub const registers = struct { /// address: 0x48000404 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -979,7 +979,7 @@ pub const registers = struct { /// address: 0x48000408 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -1033,7 +1033,7 @@ pub const registers = struct { /// address: 0x4800040c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -1086,7 +1086,7 @@ pub const registers = struct { /// address: 0x48000410 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -1155,7 +1155,7 @@ pub const registers = struct { /// address: 0x48000414 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -1225,7 +1225,7 @@ pub const registers = struct { /// address: 0x48000418 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -1327,7 +1327,7 @@ pub const registers = struct { /// address: 0x4800041c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -1398,7 +1398,7 @@ pub const registers = struct { /// address: 0x48000420 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -1428,7 +1428,7 @@ pub const registers = struct { /// address: 0x48000424 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -1457,7 +1457,7 @@ pub const registers = struct { /// address: 0x48000428 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -1513,7 +1513,7 @@ pub const registers = struct { /// address: 0x48000800 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -1566,7 +1566,7 @@ pub const registers = struct { /// address: 0x48000804 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -1626,7 +1626,7 @@ pub const registers = struct { /// address: 0x48000808 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -1680,7 +1680,7 @@ pub const registers = struct { /// address: 0x4800080c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -1733,7 +1733,7 @@ pub const registers = struct { /// address: 0x48000810 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -1802,7 +1802,7 @@ pub const registers = struct { /// address: 0x48000814 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -1872,7 +1872,7 @@ pub const registers = struct { /// address: 0x48000818 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -1974,7 +1974,7 @@ pub const registers = struct { /// address: 0x4800081c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -2045,7 +2045,7 @@ pub const registers = struct { /// address: 0x48000820 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -2075,7 +2075,7 @@ pub const registers = struct { /// address: 0x48000824 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -2104,7 +2104,7 @@ pub const registers = struct { /// address: 0x48000828 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -2160,7 +2160,7 @@ pub const registers = struct { /// address: 0x48000c00 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -2213,7 +2213,7 @@ pub const registers = struct { /// address: 0x48000c04 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -2273,7 +2273,7 @@ pub const registers = struct { /// address: 0x48000c08 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -2327,7 +2327,7 @@ pub const registers = struct { /// address: 0x48000c0c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -2380,7 +2380,7 @@ pub const registers = struct { /// address: 0x48000c10 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -2449,7 +2449,7 @@ pub const registers = struct { /// address: 0x48000c14 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -2519,7 +2519,7 @@ pub const registers = struct { /// address: 0x48000c18 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -2621,7 +2621,7 @@ pub const registers = struct { /// address: 0x48000c1c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -2692,7 +2692,7 @@ pub const registers = struct { /// address: 0x48000c20 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -2722,7 +2722,7 @@ pub const registers = struct { /// address: 0x48000c24 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -2751,7 +2751,7 @@ pub const registers = struct { /// address: 0x48000c28 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -2807,7 +2807,7 @@ pub const registers = struct { /// address: 0x48001000 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -2860,7 +2860,7 @@ pub const registers = struct { /// address: 0x48001004 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -2920,7 +2920,7 @@ pub const registers = struct { /// address: 0x48001008 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -2974,7 +2974,7 @@ pub const registers = struct { /// address: 0x4800100c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -3027,7 +3027,7 @@ pub const registers = struct { /// address: 0x48001010 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -3096,7 +3096,7 @@ pub const registers = struct { /// address: 0x48001014 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -3166,7 +3166,7 @@ pub const registers = struct { /// address: 0x48001018 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -3268,7 +3268,7 @@ pub const registers = struct { /// address: 0x4800101c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -3339,7 +3339,7 @@ pub const registers = struct { /// address: 0x48001020 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -3369,7 +3369,7 @@ pub const registers = struct { /// address: 0x48001024 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -3398,7 +3398,7 @@ pub const registers = struct { /// address: 0x48001028 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -3454,7 +3454,7 @@ pub const registers = struct { /// address: 0x48001400 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -3507,7 +3507,7 @@ pub const registers = struct { /// address: 0x48001404 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -3567,7 +3567,7 @@ pub const registers = struct { /// address: 0x48001408 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -3621,7 +3621,7 @@ pub const registers = struct { /// address: 0x4800140c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -3674,7 +3674,7 @@ pub const registers = struct { /// address: 0x48001410 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -3743,7 +3743,7 @@ pub const registers = struct { /// address: 0x48001414 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -3813,7 +3813,7 @@ pub const registers = struct { /// address: 0x48001418 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -3915,7 +3915,7 @@ pub const registers = struct { /// address: 0x4800141c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -3986,7 +3986,7 @@ pub const registers = struct { /// address: 0x48001420 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -4016,7 +4016,7 @@ pub const registers = struct { /// address: 0x48001424 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -4045,7 +4045,7 @@ pub const registers = struct { /// address: 0x48001428 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -4101,7 +4101,7 @@ pub const registers = struct { /// address: 0x48001800 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -4154,7 +4154,7 @@ pub const registers = struct { /// address: 0x48001804 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -4214,7 +4214,7 @@ pub const registers = struct { /// address: 0x48001808 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -4268,7 +4268,7 @@ pub const registers = struct { /// address: 0x4800180c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -4321,7 +4321,7 @@ pub const registers = struct { /// address: 0x48001810 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -4390,7 +4390,7 @@ pub const registers = struct { /// address: 0x48001814 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -4460,7 +4460,7 @@ pub const registers = struct { /// address: 0x48001818 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -4562,7 +4562,7 @@ pub const registers = struct { /// address: 0x4800181c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -4633,7 +4633,7 @@ pub const registers = struct { /// address: 0x48001820 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -4663,7 +4663,7 @@ pub const registers = struct { /// address: 0x48001824 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -4692,7 +4692,7 @@ pub const registers = struct { /// address: 0x48001828 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -4748,7 +4748,7 @@ pub const registers = struct { /// address: 0x48001c00 /// GPIO port mode register - pub const MODER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MODER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) MODER0: u2, @@ -4801,7 +4801,7 @@ pub const registers = struct { /// address: 0x48001c04 /// GPIO port output type register - pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OTYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bit 0 OT0: u1, /// Port x configuration bit 1 @@ -4861,7 +4861,7 @@ pub const registers = struct { /// address: 0x48001c08 /// GPIO port output speed /// register - pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OSPEEDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) OSPEEDR0: u2, @@ -4915,7 +4915,7 @@ pub const registers = struct { /// address: 0x48001c0c /// GPIO port pull-up/pull-down /// register - pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PUPDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x configuration bits (y = /// 0..15) PUPDR0: u2, @@ -4968,7 +4968,7 @@ pub const registers = struct { /// address: 0x48001c10 /// GPIO port input data register - pub const IDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDR = @intToPtr(*volatile Mmio(32, packed struct { /// Port input data (y = /// 0..15) IDR0: u1, @@ -5037,7 +5037,7 @@ pub const registers = struct { /// address: 0x48001c14 /// GPIO port output data register - pub const ODR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ODR = @intToPtr(*volatile Mmio(32, packed struct { /// Port output data (y = /// 0..15) ODR0: u1, @@ -5107,7 +5107,7 @@ pub const registers = struct { /// address: 0x48001c18 /// GPIO port bit set/reset /// register - pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BSRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x set bit y (y= /// 0..15) BS0: u1, @@ -5209,7 +5209,7 @@ pub const registers = struct { /// address: 0x48001c1c /// GPIO port configuration lock /// register - pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LCKR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x lock bit y (y= /// 0..15) LCK0: u1, @@ -5280,7 +5280,7 @@ pub const registers = struct { /// address: 0x48001c20 /// GPIO alternate function low /// register - pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRL = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 0..7) AFRL0: u4, @@ -5310,7 +5310,7 @@ pub const registers = struct { /// address: 0x48001c24 /// GPIO alternate function high /// register - pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFRH = @intToPtr(*volatile Mmio(32, packed struct { /// Alternate function selection for port x /// bit y (y = 8..15) AFRH8: u4, @@ -5339,7 +5339,7 @@ pub const registers = struct { /// address: 0x48001c28 /// Port bit reset register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// Port x Reset bit y BR0: u1, /// Port x Reset bit y @@ -5396,7 +5396,7 @@ pub const registers = struct { /// address: 0x40024000 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Touch sensing controller /// enable TSCE: u1, @@ -5431,7 +5431,7 @@ pub const registers = struct { /// address: 0x40024004 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// End of acquisition interrupt /// enable EOAIE: u1, @@ -5472,7 +5472,7 @@ pub const registers = struct { /// address: 0x40024008 /// interrupt clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// End of acquisition interrupt /// clear EOAIC: u1, @@ -5513,7 +5513,7 @@ pub const registers = struct { /// address: 0x4002400c /// interrupt status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// End of acquisition flag EOAF: u1, /// Max count error flag @@ -5553,7 +5553,7 @@ pub const registers = struct { /// address: 0x40024010 /// I/O hysteresis control /// register - pub const IOHCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOHCR = @intToPtr(*volatile Mmio(32, packed struct { /// G1_IO1 Schmitt trigger hysteresis /// mode G1_IO1: u1, @@ -5655,7 +5655,7 @@ pub const registers = struct { /// address: 0x40024018 /// I/O analog switch control /// register - pub const IOASCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOASCR = @intToPtr(*volatile Mmio(32, packed struct { /// G1_IO1 analog switch /// enable G1_IO1: u1, @@ -5756,7 +5756,7 @@ pub const registers = struct { /// address: 0x40024020 /// I/O sampling control register - pub const IOSCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOSCR = @intToPtr(*volatile Mmio(32, packed struct { /// G1_IO1 sampling mode G1_IO1: u1, /// G1_IO2 sampling mode @@ -5825,7 +5825,7 @@ pub const registers = struct { /// address: 0x40024028 /// I/O channel control register - pub const IOCCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOCCR = @intToPtr(*volatile Mmio(32, packed struct { /// G1_IO1 channel mode G1_IO1: u1, /// G1_IO2 channel mode @@ -5895,7 +5895,7 @@ pub const registers = struct { /// address: 0x40024030 /// I/O group control status /// register - pub const IOGCSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOGCSR = @intToPtr(*volatile Mmio(32, packed struct { /// Analog I/O group x enable G1E: u1, /// Analog I/O group x enable @@ -5948,7 +5948,7 @@ pub const registers = struct { /// address: 0x40024034 /// I/O group x counter register - pub const IOG1CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG1CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -5973,7 +5973,7 @@ pub const registers = struct { /// address: 0x40024038 /// I/O group x counter register - pub const IOG2CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG2CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -5998,7 +5998,7 @@ pub const registers = struct { /// address: 0x4002403c /// I/O group x counter register - pub const IOG3CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG3CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6023,7 +6023,7 @@ pub const registers = struct { /// address: 0x40024040 /// I/O group x counter register - pub const IOG4CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG4CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6048,7 +6048,7 @@ pub const registers = struct { /// address: 0x40024044 /// I/O group x counter register - pub const IOG5CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG5CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6073,7 +6073,7 @@ pub const registers = struct { /// address: 0x40024048 /// I/O group x counter register - pub const IOG6CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG6CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6098,7 +6098,7 @@ pub const registers = struct { /// address: 0x4002404c /// I/O group x counter register - pub const IOG7CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG7CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6123,7 +6123,7 @@ pub const registers = struct { /// address: 0x40024050 /// I/O group x counter register - pub const IOG8CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IOG8CR = @intToPtr(*volatile Mmio(32, packed struct { /// Counter value CNT: u14, padding0: u1, @@ -6161,7 +6161,7 @@ pub const registers = struct { /// address: 0x40023008 /// Control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// reset bit RESET: u1, reserved0: u1, @@ -6212,7 +6212,7 @@ pub const registers = struct { /// address: 0x40022000 /// Flash access control register - pub const ACR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ACR = @intToPtr(*volatile Mmio(32, packed struct { /// LATENCY LATENCY: u3, reserved0: u1, @@ -6250,7 +6250,7 @@ pub const registers = struct { /// address: 0x40022004 /// Flash key register - pub const KEYR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const KEYR = @intToPtr(*volatile Mmio(32, packed struct { /// Flash Key FKEYR: u32, }), base_address + 0x4); @@ -6261,7 +6261,7 @@ pub const registers = struct { /// address: 0x4002200c /// Flash status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Busy BSY: u1, reserved0: u1, @@ -6302,7 +6302,7 @@ pub const registers = struct { /// address: 0x40022010 /// Flash control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Programming PG: u1, /// Page erase @@ -6351,14 +6351,14 @@ pub const registers = struct { /// address: 0x40022014 /// Flash address register - pub const AR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AR = @intToPtr(*volatile Mmio(32, packed struct { /// Flash address FAR: u32, }), base_address + 0x14); /// address: 0x4002201c /// Option byte register - pub const OBR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OBR = @intToPtr(*volatile Mmio(32, packed struct { /// Option byte error OPTERR: u1, /// Level 1 protection status @@ -6392,7 +6392,7 @@ pub const registers = struct { /// address: 0x40022020 /// Write protection register - pub const WRPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const WRPR = @intToPtr(*volatile Mmio(32, packed struct { /// Write protect WRP: u32, }), base_address + 0x20); @@ -6403,7 +6403,7 @@ pub const registers = struct { /// address: 0x40021000 /// Clock control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Internal High Speed clock /// enable HSION: u1, @@ -6448,7 +6448,7 @@ pub const registers = struct { /// address: 0x40021004 /// Clock configuration register /// (RCC_CFGR) - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// System clock Switch SW: u2, /// System Clock Switch Status @@ -6488,7 +6488,7 @@ pub const registers = struct { /// address: 0x40021008 /// Clock interrupt register /// (RCC_CIR) - pub const CIR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CIR = @intToPtr(*volatile Mmio(32, packed struct { /// LSI Ready Interrupt flag LSIRDYF: u1, /// LSE Ready Interrupt flag @@ -6545,7 +6545,7 @@ pub const registers = struct { /// address: 0x4002100c /// APB2 peripheral reset register /// (RCC_APB2RSTR) - pub const APB2RSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB2RSTR = @intToPtr(*volatile Mmio(32, packed struct { /// SYSCFG and COMP reset SYSCFGRST: u1, reserved0: u1, @@ -6591,7 +6591,7 @@ pub const registers = struct { /// address: 0x40021010 /// APB1 peripheral reset register /// (RCC_APB1RSTR) - pub const APB1RSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB1RSTR = @intToPtr(*volatile Mmio(32, packed struct { /// Timer 2 reset TIM2RST: u1, /// Timer 3 reset @@ -6648,7 +6648,7 @@ pub const registers = struct { /// address: 0x40021014 /// AHB Peripheral Clock enable register /// (RCC_AHBENR) - pub const AHBENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AHBENR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA1 clock enable DMAEN: u1, /// DMA2 clock enable @@ -6705,7 +6705,7 @@ pub const registers = struct { /// address: 0x40021018 /// APB2 peripheral clock enable register /// (RCC_APB2ENR) - pub const APB2ENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB2ENR = @intToPtr(*volatile Mmio(32, packed struct { /// SYSCFG clock enable SYSCFGEN: u1, reserved0: u1, @@ -6751,7 +6751,7 @@ pub const registers = struct { /// address: 0x4002101c /// APB1 peripheral clock enable register /// (RCC_APB1ENR) - pub const APB1ENR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB1ENR = @intToPtr(*volatile Mmio(32, packed struct { /// Timer 2 clock enable TIM2EN: u1, /// Timer 3 clock enable @@ -6812,7 +6812,7 @@ pub const registers = struct { /// address: 0x40021020 /// Backup domain control register /// (RCC_BDCR) - pub const BDCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDCR = @intToPtr(*volatile Mmio(32, packed struct { /// External Low Speed oscillator /// enable LSEON: u1, @@ -6860,7 +6860,7 @@ pub const registers = struct { /// address: 0x40021024 /// Control/status register /// (RCC_CSR) - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Internal low speed oscillator /// enable LSION: u1, @@ -6911,7 +6911,7 @@ pub const registers = struct { /// address: 0x40021028 /// AHB peripheral reset register - pub const AHBRSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AHBRSTR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -6962,7 +6962,7 @@ pub const registers = struct { /// address: 0x4002102c /// Clock configuration register 2 - pub const CFGR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR2 = @intToPtr(*volatile Mmio(32, packed struct { /// PREDIV division factor PREDIV: u4, /// ADC1 and ADC2 prescaler @@ -6991,7 +6991,7 @@ pub const registers = struct { /// address: 0x40021030 /// Clock configuration register 3 - pub const CFGR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR3 = @intToPtr(*volatile Mmio(32, packed struct { /// USART1 clock source /// selection USART1SW: u2, @@ -7048,7 +7048,7 @@ pub const registers = struct { /// address: 0x40020000 /// DMA interrupt status register /// (DMA_ISR) - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// flag GIF1: u1, @@ -7142,7 +7142,7 @@ pub const registers = struct { /// address: 0x40020004 /// DMA interrupt flag clear register /// (DMA_IFCR) - pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// clear CGIF1: u1, @@ -7236,7 +7236,7 @@ pub const registers = struct { /// address: 0x40020008 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7286,7 +7286,7 @@ pub const registers = struct { /// address: 0x4002000c /// DMA channel 1 number of data /// register - pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7310,7 +7310,7 @@ pub const registers = struct { /// address: 0x40020010 /// DMA channel 1 peripheral address /// register - pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x10); @@ -7318,7 +7318,7 @@ pub const registers = struct { /// address: 0x40020014 /// DMA channel 1 memory address /// register - pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x14); @@ -7326,7 +7326,7 @@ pub const registers = struct { /// address: 0x4002001c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7376,7 +7376,7 @@ pub const registers = struct { /// address: 0x40020020 /// DMA channel 2 number of data /// register - pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7400,7 +7400,7 @@ pub const registers = struct { /// address: 0x40020024 /// DMA channel 2 peripheral address /// register - pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x24); @@ -7408,7 +7408,7 @@ pub const registers = struct { /// address: 0x40020028 /// DMA channel 2 memory address /// register - pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x28); @@ -7416,7 +7416,7 @@ pub const registers = struct { /// address: 0x40020030 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7466,7 +7466,7 @@ pub const registers = struct { /// address: 0x40020034 /// DMA channel 3 number of data /// register - pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7490,7 +7490,7 @@ pub const registers = struct { /// address: 0x40020038 /// DMA channel 3 peripheral address /// register - pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x38); @@ -7498,7 +7498,7 @@ pub const registers = struct { /// address: 0x4002003c /// DMA channel 3 memory address /// register - pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x3c); @@ -7506,7 +7506,7 @@ pub const registers = struct { /// address: 0x40020044 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7556,7 +7556,7 @@ pub const registers = struct { /// address: 0x40020048 /// DMA channel 4 number of data /// register - pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7580,7 +7580,7 @@ pub const registers = struct { /// address: 0x4002004c /// DMA channel 4 peripheral address /// register - pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x4c); @@ -7588,7 +7588,7 @@ pub const registers = struct { /// address: 0x40020050 /// DMA channel 4 memory address /// register - pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x50); @@ -7596,7 +7596,7 @@ pub const registers = struct { /// address: 0x40020058 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7646,7 +7646,7 @@ pub const registers = struct { /// address: 0x4002005c /// DMA channel 5 number of data /// register - pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7670,7 +7670,7 @@ pub const registers = struct { /// address: 0x40020060 /// DMA channel 5 peripheral address /// register - pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x60); @@ -7678,7 +7678,7 @@ pub const registers = struct { /// address: 0x40020064 /// DMA channel 5 memory address /// register - pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x64); @@ -7686,7 +7686,7 @@ pub const registers = struct { /// address: 0x4002006c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7736,7 +7736,7 @@ pub const registers = struct { /// address: 0x40020070 /// DMA channel 6 number of data /// register - pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7760,7 +7760,7 @@ pub const registers = struct { /// address: 0x40020074 /// DMA channel 6 peripheral address /// register - pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x74); @@ -7768,7 +7768,7 @@ pub const registers = struct { /// address: 0x40020078 /// DMA channel 6 memory address /// register - pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x78); @@ -7776,7 +7776,7 @@ pub const registers = struct { /// address: 0x40020080 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -7826,7 +7826,7 @@ pub const registers = struct { /// address: 0x40020084 /// DMA channel 7 number of data /// register - pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -7850,7 +7850,7 @@ pub const registers = struct { /// address: 0x40020088 /// DMA channel 7 peripheral address /// register - pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x88); @@ -7858,7 +7858,7 @@ pub const registers = struct { /// address: 0x4002008c /// DMA channel 7 memory address /// register - pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x8c); @@ -7869,7 +7869,7 @@ pub const registers = struct { /// address: 0x40020400 /// DMA interrupt status register /// (DMA_ISR) - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// flag GIF1: u1, @@ -7963,7 +7963,7 @@ pub const registers = struct { /// address: 0x40020404 /// DMA interrupt flag clear register /// (DMA_IFCR) - pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IFCR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel 1 Global interrupt /// clear CGIF1: u1, @@ -8057,7 +8057,7 @@ pub const registers = struct { /// address: 0x40020408 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8107,7 +8107,7 @@ pub const registers = struct { /// address: 0x4002040c /// DMA channel 1 number of data /// register - pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8131,7 +8131,7 @@ pub const registers = struct { /// address: 0x40020410 /// DMA channel 1 peripheral address /// register - pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x10); @@ -8139,7 +8139,7 @@ pub const registers = struct { /// address: 0x40020414 /// DMA channel 1 memory address /// register - pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x14); @@ -8147,7 +8147,7 @@ pub const registers = struct { /// address: 0x4002041c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8197,7 +8197,7 @@ pub const registers = struct { /// address: 0x40020420 /// DMA channel 2 number of data /// register - pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8221,7 +8221,7 @@ pub const registers = struct { /// address: 0x40020424 /// DMA channel 2 peripheral address /// register - pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x24); @@ -8229,7 +8229,7 @@ pub const registers = struct { /// address: 0x40020428 /// DMA channel 2 memory address /// register - pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x28); @@ -8237,7 +8237,7 @@ pub const registers = struct { /// address: 0x40020430 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8287,7 +8287,7 @@ pub const registers = struct { /// address: 0x40020434 /// DMA channel 3 number of data /// register - pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8311,7 +8311,7 @@ pub const registers = struct { /// address: 0x40020438 /// DMA channel 3 peripheral address /// register - pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x38); @@ -8319,7 +8319,7 @@ pub const registers = struct { /// address: 0x4002043c /// DMA channel 3 memory address /// register - pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x3c); @@ -8327,7 +8327,7 @@ pub const registers = struct { /// address: 0x40020444 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8377,7 +8377,7 @@ pub const registers = struct { /// address: 0x40020448 /// DMA channel 4 number of data /// register - pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8401,7 +8401,7 @@ pub const registers = struct { /// address: 0x4002044c /// DMA channel 4 peripheral address /// register - pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x4c); @@ -8409,7 +8409,7 @@ pub const registers = struct { /// address: 0x40020450 /// DMA channel 4 memory address /// register - pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x50); @@ -8417,7 +8417,7 @@ pub const registers = struct { /// address: 0x40020458 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8467,7 +8467,7 @@ pub const registers = struct { /// address: 0x4002045c /// DMA channel 5 number of data /// register - pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8491,7 +8491,7 @@ pub const registers = struct { /// address: 0x40020460 /// DMA channel 5 peripheral address /// register - pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x60); @@ -8499,7 +8499,7 @@ pub const registers = struct { /// address: 0x40020464 /// DMA channel 5 memory address /// register - pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x64); @@ -8507,7 +8507,7 @@ pub const registers = struct { /// address: 0x4002046c /// DMA channel configuration register /// (DMA_CCR) - pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8557,7 +8557,7 @@ pub const registers = struct { /// address: 0x40020470 /// DMA channel 6 number of data /// register - pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8581,7 +8581,7 @@ pub const registers = struct { /// address: 0x40020474 /// DMA channel 6 peripheral address /// register - pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x74); @@ -8589,7 +8589,7 @@ pub const registers = struct { /// address: 0x40020478 /// DMA channel 6 memory address /// register - pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR6 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x78); @@ -8597,7 +8597,7 @@ pub const registers = struct { /// address: 0x40020480 /// DMA channel configuration register /// (DMA_CCR) - pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Channel enable EN: u1, /// Transfer complete interrupt @@ -8647,7 +8647,7 @@ pub const registers = struct { /// address: 0x40020484 /// DMA channel 7 number of data /// register - pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNDTR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Number of data to transfer NDT: u16, padding0: u1, @@ -8671,7 +8671,7 @@ pub const registers = struct { /// address: 0x40020488 /// DMA channel 7 peripheral address /// register - pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral address PA: u32, }), base_address + 0x88); @@ -8679,7 +8679,7 @@ pub const registers = struct { /// address: 0x4002048c /// DMA channel 7 memory address /// register - pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CMAR7 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory address MA: u32, }), base_address + 0x8c); @@ -8690,7 +8690,7 @@ pub const registers = struct { /// address: 0x40000000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -8735,7 +8735,7 @@ pub const registers = struct { /// address: 0x40000004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -8774,7 +8774,7 @@ pub const registers = struct { /// address: 0x40000008 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -8812,7 +8812,7 @@ pub const registers = struct { /// address: 0x4000000c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -8869,7 +8869,7 @@ pub const registers = struct { /// address: 0x40000010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -8924,7 +8924,7 @@ pub const registers = struct { /// address: 0x40000014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -8972,7 +8972,7 @@ pub const registers = struct { /// address: 0x40000018 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9026,7 +9026,7 @@ pub const registers = struct { /// address: 0x40000018 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9062,7 +9062,7 @@ pub const registers = struct { /// address: 0x4000001c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9114,7 +9114,7 @@ pub const registers = struct { /// address: 0x4000001c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9150,7 +9150,7 @@ pub const registers = struct { /// address: 0x40000020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -9211,7 +9211,7 @@ pub const registers = struct { /// address: 0x40000024 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// Low counter value CNTL: u16, /// High counter value @@ -9228,7 +9228,7 @@ pub const registers = struct { /// address: 0x4000002c /// auto-reload register - pub const ARR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ARR = @intToPtr(*volatile Mmio(32, packed struct { /// Low Auto-reload value ARRL: u16, /// High Auto-reload value @@ -9237,7 +9237,7 @@ pub const registers = struct { /// address: 0x40000034 /// capture/compare register 1 - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 1 /// value CCR1L: u16, @@ -9248,7 +9248,7 @@ pub const registers = struct { /// address: 0x40000038 /// capture/compare register 2 - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 2 /// value CCR2L: u16, @@ -9259,7 +9259,7 @@ pub const registers = struct { /// address: 0x4000003c /// capture/compare register 3 - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR3L: u16, /// High Capture/Compare value (on @@ -9269,7 +9269,7 @@ pub const registers = struct { /// address: 0x40000040 /// capture/compare register 4 - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR4L: u16, /// High Capture/Compare value (on @@ -9279,7 +9279,7 @@ pub const registers = struct { /// address: 0x40000048 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -9310,7 +9310,7 @@ pub const registers = struct { /// address: 0x4000004c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -9337,7 +9337,7 @@ pub const registers = struct { /// address: 0x40000400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -9382,7 +9382,7 @@ pub const registers = struct { /// address: 0x40000404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -9421,7 +9421,7 @@ pub const registers = struct { /// address: 0x40000408 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -9459,7 +9459,7 @@ pub const registers = struct { /// address: 0x4000040c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -9516,7 +9516,7 @@ pub const registers = struct { /// address: 0x40000410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -9571,7 +9571,7 @@ pub const registers = struct { /// address: 0x40000414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -9619,7 +9619,7 @@ pub const registers = struct { /// address: 0x40000418 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9673,7 +9673,7 @@ pub const registers = struct { /// address: 0x40000418 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -9709,7 +9709,7 @@ pub const registers = struct { /// address: 0x4000041c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9761,7 +9761,7 @@ pub const registers = struct { /// address: 0x4000041c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -9797,7 +9797,7 @@ pub const registers = struct { /// address: 0x40000420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -9858,7 +9858,7 @@ pub const registers = struct { /// address: 0x40000424 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// Low counter value CNTL: u16, /// High counter value @@ -9875,7 +9875,7 @@ pub const registers = struct { /// address: 0x4000042c /// auto-reload register - pub const ARR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ARR = @intToPtr(*volatile Mmio(32, packed struct { /// Low Auto-reload value ARRL: u16, /// High Auto-reload value @@ -9884,7 +9884,7 @@ pub const registers = struct { /// address: 0x40000434 /// capture/compare register 1 - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 1 /// value CCR1L: u16, @@ -9895,7 +9895,7 @@ pub const registers = struct { /// address: 0x40000438 /// capture/compare register 2 - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 2 /// value CCR2L: u16, @@ -9906,7 +9906,7 @@ pub const registers = struct { /// address: 0x4000043c /// capture/compare register 3 - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR3L: u16, /// High Capture/Compare value (on @@ -9916,7 +9916,7 @@ pub const registers = struct { /// address: 0x40000440 /// capture/compare register 4 - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR4L: u16, /// High Capture/Compare value (on @@ -9926,7 +9926,7 @@ pub const registers = struct { /// address: 0x40000448 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -9957,7 +9957,7 @@ pub const registers = struct { /// address: 0x4000044c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -9984,7 +9984,7 @@ pub const registers = struct { /// address: 0x40000800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -10029,7 +10029,7 @@ pub const registers = struct { /// address: 0x40000804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -10068,7 +10068,7 @@ pub const registers = struct { /// address: 0x40000808 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -10106,7 +10106,7 @@ pub const registers = struct { /// address: 0x4000080c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -10163,7 +10163,7 @@ pub const registers = struct { /// address: 0x40000810 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -10218,7 +10218,7 @@ pub const registers = struct { /// address: 0x40000814 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -10266,7 +10266,7 @@ pub const registers = struct { /// address: 0x40000818 /// capture/compare mode register 1 (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10320,7 +10320,7 @@ pub const registers = struct { /// address: 0x40000818 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10356,7 +10356,7 @@ pub const registers = struct { /// address: 0x4000081c /// capture/compare mode register 2 (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -10408,7 +10408,7 @@ pub const registers = struct { /// address: 0x4000081c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -10444,7 +10444,7 @@ pub const registers = struct { /// address: 0x40000820 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -10505,7 +10505,7 @@ pub const registers = struct { /// address: 0x40000824 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// Low counter value CNTL: u16, /// High counter value @@ -10522,7 +10522,7 @@ pub const registers = struct { /// address: 0x4000082c /// auto-reload register - pub const ARR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ARR = @intToPtr(*volatile Mmio(32, packed struct { /// Low Auto-reload value ARRL: u16, /// High Auto-reload value @@ -10531,7 +10531,7 @@ pub const registers = struct { /// address: 0x40000834 /// capture/compare register 1 - pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 1 /// value CCR1L: u16, @@ -10542,7 +10542,7 @@ pub const registers = struct { /// address: 0x40000838 /// capture/compare register 2 - pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare 2 /// value CCR2L: u16, @@ -10553,7 +10553,7 @@ pub const registers = struct { /// address: 0x4000083c /// capture/compare register 3 - pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR3L: u16, /// High Capture/Compare value (on @@ -10563,7 +10563,7 @@ pub const registers = struct { /// address: 0x40000840 /// capture/compare register 4 - pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// Low Capture/Compare value CCR4L: u16, /// High Capture/Compare value (on @@ -10573,7 +10573,7 @@ pub const registers = struct { /// address: 0x40000848 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -10604,7 +10604,7 @@ pub const registers = struct { /// address: 0x4000084c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -10632,7 +10632,7 @@ pub const registers = struct { /// address: 0x40014000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -10675,7 +10675,7 @@ pub const registers = struct { /// address: 0x40014004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -10721,7 +10721,7 @@ pub const registers = struct { /// address: 0x40014008 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, reserved0: u1, @@ -10758,7 +10758,7 @@ pub const registers = struct { /// address: 0x4001400c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -10810,7 +10810,7 @@ pub const registers = struct { /// address: 0x40014010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -10859,7 +10859,7 @@ pub const registers = struct { /// address: 0x40014014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -10906,7 +10906,7 @@ pub const registers = struct { /// address: 0x40014018 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10956,7 +10956,7 @@ pub const registers = struct { /// address: 0x40014018 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -10992,7 +10992,7 @@ pub const registers = struct { /// address: 0x40014020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -11043,7 +11043,7 @@ pub const registers = struct { /// address: 0x40014024 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -11075,7 +11075,7 @@ pub const registers = struct { /// address: 0x40014030 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u8, padding0: u1, @@ -11114,7 +11114,7 @@ pub const registers = struct { /// address: 0x40014044 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -11151,7 +11151,7 @@ pub const registers = struct { /// address: 0x40014048 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -11182,7 +11182,7 @@ pub const registers = struct { /// address: 0x4001404c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -11210,7 +11210,7 @@ pub const registers = struct { /// address: 0x40014400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -11253,7 +11253,7 @@ pub const registers = struct { /// address: 0x40014404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -11298,7 +11298,7 @@ pub const registers = struct { /// address: 0x4001440c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -11346,7 +11346,7 @@ pub const registers = struct { /// address: 0x40014410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -11391,7 +11391,7 @@ pub const registers = struct { /// address: 0x40014414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -11436,7 +11436,7 @@ pub const registers = struct { /// address: 0x40014418 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11479,7 +11479,7 @@ pub const registers = struct { /// address: 0x40014418 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11516,7 +11516,7 @@ pub const registers = struct { /// address: 0x40014420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -11561,7 +11561,7 @@ pub const registers = struct { /// address: 0x40014424 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -11593,7 +11593,7 @@ pub const registers = struct { /// address: 0x40014430 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u8, padding0: u1, @@ -11628,7 +11628,7 @@ pub const registers = struct { /// address: 0x40014444 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -11665,7 +11665,7 @@ pub const registers = struct { /// address: 0x40014448 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -11696,7 +11696,7 @@ pub const registers = struct { /// address: 0x4001444c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -11728,7 +11728,7 @@ pub const registers = struct { /// address: 0x40014800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -11771,7 +11771,7 @@ pub const registers = struct { /// address: 0x40014804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -11816,7 +11816,7 @@ pub const registers = struct { /// address: 0x4001480c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -11864,7 +11864,7 @@ pub const registers = struct { /// address: 0x40014810 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -11909,7 +11909,7 @@ pub const registers = struct { /// address: 0x40014814 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -11954,7 +11954,7 @@ pub const registers = struct { /// address: 0x40014818 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -11997,7 +11997,7 @@ pub const registers = struct { /// address: 0x40014818 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -12034,7 +12034,7 @@ pub const registers = struct { /// address: 0x40014820 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -12079,7 +12079,7 @@ pub const registers = struct { /// address: 0x40014824 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -12111,7 +12111,7 @@ pub const registers = struct { /// address: 0x40014830 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u8, padding0: u1, @@ -12146,7 +12146,7 @@ pub const registers = struct { /// address: 0x40014844 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -12183,7 +12183,7 @@ pub const registers = struct { /// address: 0x40014848 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -12214,7 +12214,7 @@ pub const registers = struct { /// address: 0x4001484c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -12243,7 +12243,7 @@ pub const registers = struct { /// address: 0x40013800 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// USART enable UE: u1, /// USART enable in Stop mode @@ -12298,7 +12298,7 @@ pub const registers = struct { /// address: 0x40013804 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12350,7 +12350,7 @@ pub const registers = struct { /// address: 0x40013808 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -12408,7 +12408,7 @@ pub const registers = struct { /// address: 0x4001380c /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -12434,7 +12434,7 @@ pub const registers = struct { /// address: 0x40013810 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -12459,7 +12459,7 @@ pub const registers = struct { /// address: 0x40013814 /// Receiver timeout register - pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct { /// Receiver timeout value RTO: u24, /// Block Length @@ -12468,7 +12468,7 @@ pub const registers = struct { /// address: 0x40013818 /// Request register - pub const RQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RQR = @intToPtr(*volatile Mmio(32, packed struct { /// Auto baud rate request ABRRQ: u1, /// Send break request @@ -12512,7 +12512,7 @@ pub const registers = struct { /// address: 0x4001381c /// Interrupt & status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -12576,7 +12576,7 @@ pub const registers = struct { /// address: 0x40013820 /// Interrupt flag clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error clear flag PECF: u1, /// Framing error clear flag @@ -12641,7 +12641,7 @@ pub const registers = struct { /// address: 0x40004400 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// USART enable UE: u1, /// USART enable in Stop mode @@ -12696,7 +12696,7 @@ pub const registers = struct { /// address: 0x40004404 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -12748,7 +12748,7 @@ pub const registers = struct { /// address: 0x40004408 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -12806,7 +12806,7 @@ pub const registers = struct { /// address: 0x4000440c /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -12832,7 +12832,7 @@ pub const registers = struct { /// address: 0x40004410 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -12857,7 +12857,7 @@ pub const registers = struct { /// address: 0x40004414 /// Receiver timeout register - pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct { /// Receiver timeout value RTO: u24, /// Block Length @@ -12866,7 +12866,7 @@ pub const registers = struct { /// address: 0x40004418 /// Request register - pub const RQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RQR = @intToPtr(*volatile Mmio(32, packed struct { /// Auto baud rate request ABRRQ: u1, /// Send break request @@ -12910,7 +12910,7 @@ pub const registers = struct { /// address: 0x4000441c /// Interrupt & status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -12974,7 +12974,7 @@ pub const registers = struct { /// address: 0x40004420 /// Interrupt flag clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error clear flag PECF: u1, /// Framing error clear flag @@ -13039,7 +13039,7 @@ pub const registers = struct { /// address: 0x40004800 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// USART enable UE: u1, /// USART enable in Stop mode @@ -13094,7 +13094,7 @@ pub const registers = struct { /// address: 0x40004804 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13146,7 +13146,7 @@ pub const registers = struct { /// address: 0x40004808 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -13204,7 +13204,7 @@ pub const registers = struct { /// address: 0x4000480c /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -13230,7 +13230,7 @@ pub const registers = struct { /// address: 0x40004810 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -13255,7 +13255,7 @@ pub const registers = struct { /// address: 0x40004814 /// Receiver timeout register - pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct { /// Receiver timeout value RTO: u24, /// Block Length @@ -13264,7 +13264,7 @@ pub const registers = struct { /// address: 0x40004818 /// Request register - pub const RQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RQR = @intToPtr(*volatile Mmio(32, packed struct { /// Auto baud rate request ABRRQ: u1, /// Send break request @@ -13308,7 +13308,7 @@ pub const registers = struct { /// address: 0x4000481c /// Interrupt & status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -13372,7 +13372,7 @@ pub const registers = struct { /// address: 0x40004820 /// Interrupt flag clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error clear flag PECF: u1, /// Framing error clear flag @@ -13437,7 +13437,7 @@ pub const registers = struct { /// address: 0x40004c00 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// USART enable UE: u1, /// USART enable in Stop mode @@ -13492,7 +13492,7 @@ pub const registers = struct { /// address: 0x40004c04 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13544,7 +13544,7 @@ pub const registers = struct { /// address: 0x40004c08 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -13602,7 +13602,7 @@ pub const registers = struct { /// address: 0x40004c0c /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -13628,7 +13628,7 @@ pub const registers = struct { /// address: 0x40004c10 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -13653,7 +13653,7 @@ pub const registers = struct { /// address: 0x40004c14 /// Receiver timeout register - pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct { /// Receiver timeout value RTO: u24, /// Block Length @@ -13662,7 +13662,7 @@ pub const registers = struct { /// address: 0x40004c18 /// Request register - pub const RQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RQR = @intToPtr(*volatile Mmio(32, packed struct { /// Auto baud rate request ABRRQ: u1, /// Send break request @@ -13706,7 +13706,7 @@ pub const registers = struct { /// address: 0x40004c1c /// Interrupt & status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -13770,7 +13770,7 @@ pub const registers = struct { /// address: 0x40004c20 /// Interrupt flag clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error clear flag PECF: u1, /// Framing error clear flag @@ -13835,7 +13835,7 @@ pub const registers = struct { /// address: 0x40005000 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// USART enable UE: u1, /// USART enable in Stop mode @@ -13890,7 +13890,7 @@ pub const registers = struct { /// address: 0x40005004 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -13942,7 +13942,7 @@ pub const registers = struct { /// address: 0x40005008 /// Control register 3 - pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR3 = @intToPtr(*volatile Mmio(32, packed struct { /// Error interrupt enable EIE: u1, /// IrDA mode enable @@ -14000,7 +14000,7 @@ pub const registers = struct { /// address: 0x4000500c /// Baud rate register - pub const BRR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BRR = @intToPtr(*volatile Mmio(32, packed struct { /// fraction of USARTDIV DIV_Fraction: u4, /// mantissa of USARTDIV @@ -14026,7 +14026,7 @@ pub const registers = struct { /// address: 0x40005010 /// Guard time and prescaler /// register - pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const GTPR = @intToPtr(*volatile Mmio(32, packed struct { /// Prescaler value PSC: u8, /// Guard time value @@ -14051,7 +14051,7 @@ pub const registers = struct { /// address: 0x40005014 /// Receiver timeout register - pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTOR = @intToPtr(*volatile Mmio(32, packed struct { /// Receiver timeout value RTO: u24, /// Block Length @@ -14060,7 +14060,7 @@ pub const registers = struct { /// address: 0x40005018 /// Request register - pub const RQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RQR = @intToPtr(*volatile Mmio(32, packed struct { /// Auto baud rate request ABRRQ: u1, /// Send break request @@ -14104,7 +14104,7 @@ pub const registers = struct { /// address: 0x4000501c /// Interrupt & status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error PE: u1, /// Framing error @@ -14168,7 +14168,7 @@ pub const registers = struct { /// address: 0x40005020 /// Interrupt flag clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { /// Parity error clear flag PECF: u1, /// Framing error clear flag @@ -14235,7 +14235,7 @@ pub const registers = struct { /// address: 0x40013000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -14287,7 +14287,7 @@ pub const registers = struct { /// address: 0x40013004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -14337,7 +14337,7 @@ pub const registers = struct { /// address: 0x40013008 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -14387,7 +14387,7 @@ pub const registers = struct { /// address: 0x40013010 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -14410,7 +14410,7 @@ pub const registers = struct { /// address: 0x40013014 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -14433,7 +14433,7 @@ pub const registers = struct { /// address: 0x40013018 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -14456,7 +14456,7 @@ pub const registers = struct { /// address: 0x4001301c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -14501,7 +14501,7 @@ pub const registers = struct { /// address: 0x40013020 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -14538,7 +14538,7 @@ pub const registers = struct { /// address: 0x40003800 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -14590,7 +14590,7 @@ pub const registers = struct { /// address: 0x40003804 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -14640,7 +14640,7 @@ pub const registers = struct { /// address: 0x40003808 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -14690,7 +14690,7 @@ pub const registers = struct { /// address: 0x40003810 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -14713,7 +14713,7 @@ pub const registers = struct { /// address: 0x40003814 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -14736,7 +14736,7 @@ pub const registers = struct { /// address: 0x40003818 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -14759,7 +14759,7 @@ pub const registers = struct { /// address: 0x4000381c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -14804,7 +14804,7 @@ pub const registers = struct { /// address: 0x40003820 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -14841,7 +14841,7 @@ pub const registers = struct { /// address: 0x40003c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -14893,7 +14893,7 @@ pub const registers = struct { /// address: 0x40003c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -14943,7 +14943,7 @@ pub const registers = struct { /// address: 0x40003c08 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -14993,7 +14993,7 @@ pub const registers = struct { /// address: 0x40003c10 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15016,7 +15016,7 @@ pub const registers = struct { /// address: 0x40003c14 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15039,7 +15039,7 @@ pub const registers = struct { /// address: 0x40003c18 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15062,7 +15062,7 @@ pub const registers = struct { /// address: 0x40003c1c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15107,7 +15107,7 @@ pub const registers = struct { /// address: 0x40003c20 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15144,7 +15144,7 @@ pub const registers = struct { /// address: 0x40003400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15196,7 +15196,7 @@ pub const registers = struct { /// address: 0x40003404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15246,7 +15246,7 @@ pub const registers = struct { /// address: 0x40003408 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15296,7 +15296,7 @@ pub const registers = struct { /// address: 0x40003410 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15319,7 +15319,7 @@ pub const registers = struct { /// address: 0x40003414 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15342,7 +15342,7 @@ pub const registers = struct { /// address: 0x40003418 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15365,7 +15365,7 @@ pub const registers = struct { /// address: 0x4000341c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15410,7 +15410,7 @@ pub const registers = struct { /// address: 0x40003420 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15447,7 +15447,7 @@ pub const registers = struct { /// address: 0x40004000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15499,7 +15499,7 @@ pub const registers = struct { /// address: 0x40004004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15549,7 +15549,7 @@ pub const registers = struct { /// address: 0x40004008 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15599,7 +15599,7 @@ pub const registers = struct { /// address: 0x40004010 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15622,7 +15622,7 @@ pub const registers = struct { /// address: 0x40004014 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15645,7 +15645,7 @@ pub const registers = struct { /// address: 0x40004018 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15668,7 +15668,7 @@ pub const registers = struct { /// address: 0x4000401c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -15713,7 +15713,7 @@ pub const registers = struct { /// address: 0x40004020 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -15750,7 +15750,7 @@ pub const registers = struct { /// address: 0x40013c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Clock phase CPHA: u1, /// Clock polarity @@ -15802,7 +15802,7 @@ pub const registers = struct { /// address: 0x40013c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rx buffer DMA enable RXDMAEN: u1, /// Tx buffer DMA enable @@ -15852,7 +15852,7 @@ pub const registers = struct { /// address: 0x40013c08 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Receive buffer not empty RXNE: u1, /// Transmit buffer empty @@ -15902,7 +15902,7 @@ pub const registers = struct { /// address: 0x40013c10 /// CRC polynomial register - pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CRCPR = @intToPtr(*volatile Mmio(32, packed struct { /// CRC polynomial register CRCPOLY: u16, padding0: u1, @@ -15925,7 +15925,7 @@ pub const registers = struct { /// address: 0x40013c14 /// RX CRC register - pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Rx CRC register RxCRC: u16, padding0: u1, @@ -15948,7 +15948,7 @@ pub const registers = struct { /// address: 0x40013c18 /// TX CRC register - pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXCRCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tx CRC register TxCRC: u16, padding0: u1, @@ -15971,7 +15971,7 @@ pub const registers = struct { /// address: 0x40013c1c /// I2S configuration register - pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SCFGR = @intToPtr(*volatile Mmio(32, packed struct { /// Channel length (number of bits per audio /// channel) CHLEN: u1, @@ -16016,7 +16016,7 @@ pub const registers = struct { /// address: 0x40013c20 /// I2S prescaler register - pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const I2SPR = @intToPtr(*volatile Mmio(32, packed struct { /// I2S Linear prescaler I2SDIV: u8, /// Odd factor for the @@ -16055,7 +16055,7 @@ pub const registers = struct { /// address: 0x40010400 /// Interrupt mask register - pub const IMR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IMR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interrupt Mask on line 0 MR0: u1, /// Interrupt Mask on line 1 @@ -16124,7 +16124,7 @@ pub const registers = struct { /// address: 0x40010404 /// Event mask register - pub const EMR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EMR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Event Mask on line 0 MR0: u1, /// Event Mask on line 1 @@ -16194,7 +16194,7 @@ pub const registers = struct { /// address: 0x40010408 /// Rising Trigger selection /// register - pub const RTSR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTSR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Rising trigger event configuration of /// line 0 TR0: u1, @@ -16284,7 +16284,7 @@ pub const registers = struct { /// address: 0x4001040c /// Falling Trigger selection /// register - pub const FTSR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FTSR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Falling trigger event configuration of /// line 0 TR0: u1, @@ -16374,7 +16374,7 @@ pub const registers = struct { /// address: 0x40010410 /// Software interrupt event /// register - pub const SWIER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SWIER1 = @intToPtr(*volatile Mmio(32, packed struct { /// Software Interrupt on line /// 0 SWIER0: u1, @@ -16463,7 +16463,7 @@ pub const registers = struct { /// address: 0x40010414 /// Pending register - pub const PR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Pending bit 0 PR0: u1, /// Pending bit 1 @@ -16526,7 +16526,7 @@ pub const registers = struct { /// address: 0x40010418 /// Interrupt mask register - pub const IMR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IMR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Interrupt Mask on external/internal line /// 32 MR32: u1, @@ -16571,7 +16571,7 @@ pub const registers = struct { /// address: 0x4001041c /// Event mask register - pub const EMR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EMR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Event mask on external/internal line /// 32 MR32: u1, @@ -16617,7 +16617,7 @@ pub const registers = struct { /// address: 0x40010420 /// Rising Trigger selection /// register - pub const RTSR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RTSR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Rising trigger event configuration bit /// of line 32 TR32: u1, @@ -16659,7 +16659,7 @@ pub const registers = struct { /// address: 0x40010424 /// Falling Trigger selection /// register - pub const FTSR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FTSR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Falling trigger event configuration bit /// of line 32 TR32: u1, @@ -16701,7 +16701,7 @@ pub const registers = struct { /// address: 0x40010428 /// Software interrupt event /// register - pub const SWIER2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SWIER2 = @intToPtr(*volatile Mmio(32, packed struct { /// Software interrupt on line /// 32 SWIER32: u1, @@ -16742,7 +16742,7 @@ pub const registers = struct { /// address: 0x4001042c /// Pending register - pub const PR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Pending bit on line 32 PR32: u1, /// Pending bit on line 33 @@ -16785,7 +16785,7 @@ pub const registers = struct { /// address: 0x40007000 /// power control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Low-power deep sleep LPDS: u1, /// Power down deepsleep @@ -16829,7 +16829,7 @@ pub const registers = struct { /// address: 0x40007004 /// power control/status register - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Wakeup flag WUF: u1, /// Standby flag @@ -16875,7 +16875,7 @@ pub const registers = struct { /// address: 0x40006400 /// master control register - pub const MCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MCR = @intToPtr(*volatile Mmio(32, packed struct { /// INRQ INRQ: u1, /// SLEEP @@ -16922,7 +16922,7 @@ pub const registers = struct { /// address: 0x40006404 /// master status register - pub const MSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MSR = @intToPtr(*volatile Mmio(32, packed struct { /// INAK INAK: u1, /// SLAK @@ -16968,7 +16968,7 @@ pub const registers = struct { /// address: 0x40006408 /// transmit status register - pub const TSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TSR = @intToPtr(*volatile Mmio(32, packed struct { /// RQCP0 RQCP0: u1, /// TXOK0 @@ -17032,7 +17032,7 @@ pub const registers = struct { /// address: 0x4000640c /// receive FIFO 0 register - pub const RF0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RF0R = @intToPtr(*volatile Mmio(32, packed struct { /// FMP0 FMP0: u2, reserved0: u1, @@ -17072,7 +17072,7 @@ pub const registers = struct { /// address: 0x40006410 /// receive FIFO 1 register - pub const RF1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RF1R = @intToPtr(*volatile Mmio(32, packed struct { /// FMP1 FMP1: u2, reserved0: u1, @@ -17112,7 +17112,7 @@ pub const registers = struct { /// address: 0x40006414 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// TMEIE TMEIE: u1, /// FMPIE0 @@ -17163,7 +17163,7 @@ pub const registers = struct { /// address: 0x40006418 /// error status register - pub const ESR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ESR = @intToPtr(*volatile Mmio(32, packed struct { /// EWGF EWGF: u1, /// EPVF @@ -17190,7 +17190,7 @@ pub const registers = struct { /// address: 0x4000641c /// bit timing register - pub const BTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR = @intToPtr(*volatile Mmio(32, packed struct { /// BRP BRP: u10, reserved0: u1, @@ -17218,7 +17218,7 @@ pub const registers = struct { /// address: 0x40006580 /// TX mailbox identifier register - pub const TI0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TI0R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -17234,7 +17234,7 @@ pub const registers = struct { /// address: 0x40006584 /// mailbox data length control and time stamp /// register - pub const TDT0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDT0R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -17256,7 +17256,7 @@ pub const registers = struct { /// address: 0x40006588 /// mailbox data low register - pub const TDL0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDL0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -17269,7 +17269,7 @@ pub const registers = struct { /// address: 0x4000658c /// mailbox data high register - pub const TDH0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDH0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -17282,7 +17282,7 @@ pub const registers = struct { /// address: 0x40006590 /// TX mailbox identifier register - pub const TI1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TI1R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -17298,7 +17298,7 @@ pub const registers = struct { /// address: 0x40006594 /// mailbox data length control and time stamp /// register - pub const TDT1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDT1R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -17320,7 +17320,7 @@ pub const registers = struct { /// address: 0x40006598 /// mailbox data low register - pub const TDL1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDL1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -17333,7 +17333,7 @@ pub const registers = struct { /// address: 0x4000659c /// mailbox data high register - pub const TDH1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDH1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -17346,7 +17346,7 @@ pub const registers = struct { /// address: 0x400065a0 /// TX mailbox identifier register - pub const TI2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TI2R = @intToPtr(*volatile Mmio(32, packed struct { /// TXRQ TXRQ: u1, /// RTR @@ -17362,7 +17362,7 @@ pub const registers = struct { /// address: 0x400065a4 /// mailbox data length control and time stamp /// register - pub const TDT2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDT2R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -17384,7 +17384,7 @@ pub const registers = struct { /// address: 0x400065a8 /// mailbox data low register - pub const TDL2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDL2R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -17397,7 +17397,7 @@ pub const registers = struct { /// address: 0x400065ac /// mailbox data high register - pub const TDH2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TDH2R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -17411,7 +17411,7 @@ pub const registers = struct { /// address: 0x400065b0 /// receive FIFO mailbox identifier /// register - pub const RI0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RI0R = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// RTR RTR: u1, @@ -17426,7 +17426,7 @@ pub const registers = struct { /// address: 0x400065b4 /// receive FIFO mailbox data length control and /// time stamp register - pub const RDT0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDT0R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -17442,7 +17442,7 @@ pub const registers = struct { /// address: 0x400065b8 /// receive FIFO mailbox data low /// register - pub const RDL0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDL0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -17456,7 +17456,7 @@ pub const registers = struct { /// address: 0x400065bc /// receive FIFO mailbox data high /// register - pub const RDH0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDH0R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -17470,7 +17470,7 @@ pub const registers = struct { /// address: 0x400065c0 /// receive FIFO mailbox identifier /// register - pub const RI1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RI1R = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// RTR RTR: u1, @@ -17485,7 +17485,7 @@ pub const registers = struct { /// address: 0x400065c4 /// receive FIFO mailbox data length control and /// time stamp register - pub const RDT1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDT1R = @intToPtr(*volatile Mmio(32, packed struct { /// DLC DLC: u4, reserved0: u1, @@ -17501,7 +17501,7 @@ pub const registers = struct { /// address: 0x400065c8 /// receive FIFO mailbox data low /// register - pub const RDL1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDL1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA0 DATA0: u8, /// DATA1 @@ -17515,7 +17515,7 @@ pub const registers = struct { /// address: 0x400065cc /// receive FIFO mailbox data high /// register - pub const RDH1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RDH1R = @intToPtr(*volatile Mmio(32, packed struct { /// DATA4 DATA4: u8, /// DATA5 @@ -17528,7 +17528,7 @@ pub const registers = struct { /// address: 0x40006600 /// filter master register - pub const FMR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FMR = @intToPtr(*volatile Mmio(32, packed struct { /// Filter init mode FINIT: u1, reserved0: u1, @@ -17562,7 +17562,7 @@ pub const registers = struct { /// address: 0x40006604 /// filter mode register - pub const FM1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FM1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter mode FBM0: u1, /// Filter mode @@ -17627,7 +17627,7 @@ pub const registers = struct { /// address: 0x4000660c /// filter scale register - pub const FS1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FS1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter scale configuration FSC0: u1, /// Filter scale configuration @@ -17693,7 +17693,7 @@ pub const registers = struct { /// address: 0x40006614 /// filter FIFO assignment /// register - pub const FFA1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FFA1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter FIFO assignment for filter /// 0 FFA0: u1, @@ -17786,7 +17786,7 @@ pub const registers = struct { /// address: 0x4000661c /// CAN filter activation register - pub const FA1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FA1R = @intToPtr(*volatile Mmio(32, packed struct { /// Filter active FACT0: u1, /// Filter active @@ -17851,7 +17851,7 @@ pub const registers = struct { /// address: 0x40006640 /// Filter bank 0 register 1 - pub const F0R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F0R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -17920,7 +17920,7 @@ pub const registers = struct { /// address: 0x40006644 /// Filter bank 0 register 2 - pub const F0R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F0R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -17989,7 +17989,7 @@ pub const registers = struct { /// address: 0x40006648 /// Filter bank 1 register 1 - pub const F1R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F1R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18058,7 +18058,7 @@ pub const registers = struct { /// address: 0x4000664c /// Filter bank 1 register 2 - pub const F1R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F1R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18127,7 +18127,7 @@ pub const registers = struct { /// address: 0x40006650 /// Filter bank 2 register 1 - pub const F2R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F2R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18196,7 +18196,7 @@ pub const registers = struct { /// address: 0x40006654 /// Filter bank 2 register 2 - pub const F2R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F2R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18265,7 +18265,7 @@ pub const registers = struct { /// address: 0x40006658 /// Filter bank 3 register 1 - pub const F3R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F3R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18334,7 +18334,7 @@ pub const registers = struct { /// address: 0x4000665c /// Filter bank 3 register 2 - pub const F3R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F3R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18403,7 +18403,7 @@ pub const registers = struct { /// address: 0x40006660 /// Filter bank 4 register 1 - pub const F4R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F4R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18472,7 +18472,7 @@ pub const registers = struct { /// address: 0x40006664 /// Filter bank 4 register 2 - pub const F4R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F4R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18541,7 +18541,7 @@ pub const registers = struct { /// address: 0x40006668 /// Filter bank 5 register 1 - pub const F5R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F5R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18610,7 +18610,7 @@ pub const registers = struct { /// address: 0x4000666c /// Filter bank 5 register 2 - pub const F5R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F5R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18679,7 +18679,7 @@ pub const registers = struct { /// address: 0x40006670 /// Filter bank 6 register 1 - pub const F6R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F6R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18748,7 +18748,7 @@ pub const registers = struct { /// address: 0x40006674 /// Filter bank 6 register 2 - pub const F6R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F6R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18817,7 +18817,7 @@ pub const registers = struct { /// address: 0x40006678 /// Filter bank 7 register 1 - pub const F7R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F7R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18886,7 +18886,7 @@ pub const registers = struct { /// address: 0x4000667c /// Filter bank 7 register 2 - pub const F7R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F7R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -18955,7 +18955,7 @@ pub const registers = struct { /// address: 0x40006680 /// Filter bank 8 register 1 - pub const F8R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F8R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19024,7 +19024,7 @@ pub const registers = struct { /// address: 0x40006684 /// Filter bank 8 register 2 - pub const F8R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F8R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19093,7 +19093,7 @@ pub const registers = struct { /// address: 0x40006688 /// Filter bank 9 register 1 - pub const F9R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F9R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19162,7 +19162,7 @@ pub const registers = struct { /// address: 0x4000668c /// Filter bank 9 register 2 - pub const F9R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F9R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19231,7 +19231,7 @@ pub const registers = struct { /// address: 0x40006690 /// Filter bank 10 register 1 - pub const F10R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F10R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19300,7 +19300,7 @@ pub const registers = struct { /// address: 0x40006694 /// Filter bank 10 register 2 - pub const F10R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F10R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19369,7 +19369,7 @@ pub const registers = struct { /// address: 0x40006698 /// Filter bank 11 register 1 - pub const F11R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F11R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19438,7 +19438,7 @@ pub const registers = struct { /// address: 0x4000669c /// Filter bank 11 register 2 - pub const F11R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F11R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19507,7 +19507,7 @@ pub const registers = struct { /// address: 0x400066a0 /// Filter bank 4 register 1 - pub const F12R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F12R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19576,7 +19576,7 @@ pub const registers = struct { /// address: 0x400066a4 /// Filter bank 12 register 2 - pub const F12R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F12R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19645,7 +19645,7 @@ pub const registers = struct { /// address: 0x400066a8 /// Filter bank 13 register 1 - pub const F13R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F13R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19714,7 +19714,7 @@ pub const registers = struct { /// address: 0x400066ac /// Filter bank 13 register 2 - pub const F13R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F13R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19783,7 +19783,7 @@ pub const registers = struct { /// address: 0x400066b0 /// Filter bank 14 register 1 - pub const F14R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F14R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19852,7 +19852,7 @@ pub const registers = struct { /// address: 0x400066b4 /// Filter bank 14 register 2 - pub const F14R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F14R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19921,7 +19921,7 @@ pub const registers = struct { /// address: 0x400066b8 /// Filter bank 15 register 1 - pub const F15R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F15R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -19990,7 +19990,7 @@ pub const registers = struct { /// address: 0x400066bc /// Filter bank 15 register 2 - pub const F15R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F15R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20059,7 +20059,7 @@ pub const registers = struct { /// address: 0x400066c0 /// Filter bank 16 register 1 - pub const F16R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F16R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20128,7 +20128,7 @@ pub const registers = struct { /// address: 0x400066c4 /// Filter bank 16 register 2 - pub const F16R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F16R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20197,7 +20197,7 @@ pub const registers = struct { /// address: 0x400066c8 /// Filter bank 17 register 1 - pub const F17R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F17R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20266,7 +20266,7 @@ pub const registers = struct { /// address: 0x400066cc /// Filter bank 17 register 2 - pub const F17R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F17R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20335,7 +20335,7 @@ pub const registers = struct { /// address: 0x400066d0 /// Filter bank 18 register 1 - pub const F18R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F18R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20404,7 +20404,7 @@ pub const registers = struct { /// address: 0x400066d4 /// Filter bank 18 register 2 - pub const F18R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F18R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20473,7 +20473,7 @@ pub const registers = struct { /// address: 0x400066d8 /// Filter bank 19 register 1 - pub const F19R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F19R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20542,7 +20542,7 @@ pub const registers = struct { /// address: 0x400066dc /// Filter bank 19 register 2 - pub const F19R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F19R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20611,7 +20611,7 @@ pub const registers = struct { /// address: 0x400066e0 /// Filter bank 20 register 1 - pub const F20R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F20R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20680,7 +20680,7 @@ pub const registers = struct { /// address: 0x400066e4 /// Filter bank 20 register 2 - pub const F20R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F20R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20749,7 +20749,7 @@ pub const registers = struct { /// address: 0x400066e8 /// Filter bank 21 register 1 - pub const F21R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F21R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20818,7 +20818,7 @@ pub const registers = struct { /// address: 0x400066ec /// Filter bank 21 register 2 - pub const F21R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F21R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20887,7 +20887,7 @@ pub const registers = struct { /// address: 0x400066f0 /// Filter bank 22 register 1 - pub const F22R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F22R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -20956,7 +20956,7 @@ pub const registers = struct { /// address: 0x400066f4 /// Filter bank 22 register 2 - pub const F22R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F22R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21025,7 +21025,7 @@ pub const registers = struct { /// address: 0x400066f8 /// Filter bank 23 register 1 - pub const F23R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F23R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21094,7 +21094,7 @@ pub const registers = struct { /// address: 0x400066fc /// Filter bank 23 register 2 - pub const F23R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F23R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21163,7 +21163,7 @@ pub const registers = struct { /// address: 0x40006700 /// Filter bank 24 register 1 - pub const F24R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F24R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21232,7 +21232,7 @@ pub const registers = struct { /// address: 0x40006704 /// Filter bank 24 register 2 - pub const F24R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F24R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21301,7 +21301,7 @@ pub const registers = struct { /// address: 0x40006708 /// Filter bank 25 register 1 - pub const F25R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F25R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21370,7 +21370,7 @@ pub const registers = struct { /// address: 0x4000670c /// Filter bank 25 register 2 - pub const F25R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F25R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21439,7 +21439,7 @@ pub const registers = struct { /// address: 0x40006710 /// Filter bank 26 register 1 - pub const F26R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F26R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21508,7 +21508,7 @@ pub const registers = struct { /// address: 0x40006714 /// Filter bank 26 register 2 - pub const F26R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F26R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21577,7 +21577,7 @@ pub const registers = struct { /// address: 0x40006718 /// Filter bank 27 register 1 - pub const F27R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F27R1 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21646,7 +21646,7 @@ pub const registers = struct { /// address: 0x4000671c /// Filter bank 27 register 2 - pub const F27R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const F27R2 = @intToPtr(*volatile Mmio(32, packed struct { /// Filter bits FB0: u1, /// Filter bits @@ -21720,7 +21720,7 @@ pub const registers = struct { /// address: 0x40005c00 /// endpoint 0 register - pub const USB_EP0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP0R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -21768,7 +21768,7 @@ pub const registers = struct { /// address: 0x40005c04 /// endpoint 1 register - pub const USB_EP1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP1R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -21816,7 +21816,7 @@ pub const registers = struct { /// address: 0x40005c08 /// endpoint 2 register - pub const USB_EP2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP2R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -21864,7 +21864,7 @@ pub const registers = struct { /// address: 0x40005c0c /// endpoint 3 register - pub const USB_EP3R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP3R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -21912,7 +21912,7 @@ pub const registers = struct { /// address: 0x40005c10 /// endpoint 4 register - pub const USB_EP4R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP4R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -21960,7 +21960,7 @@ pub const registers = struct { /// address: 0x40005c14 /// endpoint 5 register - pub const USB_EP5R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP5R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -22008,7 +22008,7 @@ pub const registers = struct { /// address: 0x40005c18 /// endpoint 6 register - pub const USB_EP6R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP6R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -22056,7 +22056,7 @@ pub const registers = struct { /// address: 0x40005c1c /// endpoint 7 register - pub const USB_EP7R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_EP7R = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint address EA: u4, /// Status bits, for transmission @@ -22104,7 +22104,7 @@ pub const registers = struct { /// address: 0x40005c40 /// control register - pub const USB_CNTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const USB_CNTR = @intToPtr(*volatile Mmio(32, packed struct { /// Force USB Reset FRES: u1, /// Power down @@ -22159,7 +22159,7 @@ pub const registers = struct { /// address: 0x40005c44 /// interrupt status register - pub const ISTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISTR = @intToPtr(*volatile Mmio(32, packed struct { /// Endpoint Identifier EP_ID: u4, /// Direction of transaction @@ -22204,7 +22204,7 @@ pub const registers = struct { /// address: 0x40005c48 /// frame number register - pub const FNR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FNR = @intToPtr(*volatile Mmio(32, packed struct { /// Frame number FN: u11, /// Lost SOF @@ -22235,7 +22235,7 @@ pub const registers = struct { /// address: 0x40005c4c /// device address - pub const DADDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DADDR = @intToPtr(*volatile Mmio(32, packed struct { /// Device address ADD: u1, /// Device address @@ -22288,7 +22288,7 @@ pub const registers = struct { /// address: 0x40005400 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral enable PE: u1, /// TX Interrupt enable @@ -22350,7 +22350,7 @@ pub const registers = struct { /// address: 0x40005404 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Slave address bit 0 (master /// mode) SADD0: u1, @@ -22395,7 +22395,7 @@ pub const registers = struct { /// address: 0x40005408 /// Own address register 1 - pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interface address OA1_0: u1, /// Interface address @@ -22430,7 +22430,7 @@ pub const registers = struct { /// address: 0x4000540c /// Own address register 2 - pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Interface address OA2: u7, @@ -22462,7 +22462,7 @@ pub const registers = struct { /// address: 0x40005410 /// Timing register - pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct { /// SCL low period (master /// mode) SCLL: u8, @@ -22483,7 +22483,7 @@ pub const registers = struct { /// address: 0x40005414 /// Status register 1 - pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct { /// Bus timeout A TIMEOUTA: u12, /// Idle clock timeout @@ -22505,7 +22505,7 @@ pub const registers = struct { /// address: 0x40005418 /// Interrupt and Status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Transmit data register empty /// (transmitters) TXE: u1, @@ -22563,7 +22563,7 @@ pub const registers = struct { /// address: 0x4000541c /// Interrupt clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -22612,7 +22612,7 @@ pub const registers = struct { /// address: 0x40005420 /// PEC register - pub const PECR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PECR = @intToPtr(*volatile Mmio(32, packed struct { /// Packet error checking /// register PEC: u8, @@ -22644,7 +22644,7 @@ pub const registers = struct { /// address: 0x40005424 /// Receive data register - pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit receive data RXDATA: u8, padding0: u1, @@ -22675,7 +22675,7 @@ pub const registers = struct { /// address: 0x40005428 /// Transmit data register - pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit transmit data TXDATA: u8, padding0: u1, @@ -22709,7 +22709,7 @@ pub const registers = struct { /// address: 0x40005800 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral enable PE: u1, /// TX Interrupt enable @@ -22771,7 +22771,7 @@ pub const registers = struct { /// address: 0x40005804 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Slave address bit 0 (master /// mode) SADD0: u1, @@ -22816,7 +22816,7 @@ pub const registers = struct { /// address: 0x40005808 /// Own address register 1 - pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interface address OA1_0: u1, /// Interface address @@ -22851,7 +22851,7 @@ pub const registers = struct { /// address: 0x4000580c /// Own address register 2 - pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Interface address OA2: u7, @@ -22883,7 +22883,7 @@ pub const registers = struct { /// address: 0x40005810 /// Timing register - pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct { /// SCL low period (master /// mode) SCLL: u8, @@ -22904,7 +22904,7 @@ pub const registers = struct { /// address: 0x40005814 /// Status register 1 - pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct { /// Bus timeout A TIMEOUTA: u12, /// Idle clock timeout @@ -22926,7 +22926,7 @@ pub const registers = struct { /// address: 0x40005818 /// Interrupt and Status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Transmit data register empty /// (transmitters) TXE: u1, @@ -22984,7 +22984,7 @@ pub const registers = struct { /// address: 0x4000581c /// Interrupt clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -23033,7 +23033,7 @@ pub const registers = struct { /// address: 0x40005820 /// PEC register - pub const PECR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PECR = @intToPtr(*volatile Mmio(32, packed struct { /// Packet error checking /// register PEC: u8, @@ -23065,7 +23065,7 @@ pub const registers = struct { /// address: 0x40005824 /// Receive data register - pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit receive data RXDATA: u8, padding0: u1, @@ -23096,7 +23096,7 @@ pub const registers = struct { /// address: 0x40005828 /// Transmit data register - pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit transmit data TXDATA: u8, padding0: u1, @@ -23130,7 +23130,7 @@ pub const registers = struct { /// address: 0x40007800 /// Control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Peripheral enable PE: u1, /// TX Interrupt enable @@ -23192,7 +23192,7 @@ pub const registers = struct { /// address: 0x40007804 /// Control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Slave address bit 0 (master /// mode) SADD0: u1, @@ -23237,7 +23237,7 @@ pub const registers = struct { /// address: 0x40007808 /// Own address register 1 - pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Interface address OA1_0: u1, /// Interface address @@ -23272,7 +23272,7 @@ pub const registers = struct { /// address: 0x4000780c /// Own address register 2 - pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OAR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Interface address OA2: u7, @@ -23304,7 +23304,7 @@ pub const registers = struct { /// address: 0x40007810 /// Timing register - pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMINGR = @intToPtr(*volatile Mmio(32, packed struct { /// SCL low period (master /// mode) SCLL: u8, @@ -23325,7 +23325,7 @@ pub const registers = struct { /// address: 0x40007814 /// Status register 1 - pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TIMEOUTR = @intToPtr(*volatile Mmio(32, packed struct { /// Bus timeout A TIMEOUTA: u12, /// Idle clock timeout @@ -23347,7 +23347,7 @@ pub const registers = struct { /// address: 0x40007818 /// Interrupt and Status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Transmit data register empty /// (transmitters) TXE: u1, @@ -23405,7 +23405,7 @@ pub const registers = struct { /// address: 0x4000781c /// Interrupt clear register - pub const ICR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -23454,7 +23454,7 @@ pub const registers = struct { /// address: 0x40007820 /// PEC register - pub const PECR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PECR = @intToPtr(*volatile Mmio(32, packed struct { /// Packet error checking /// register PEC: u8, @@ -23486,7 +23486,7 @@ pub const registers = struct { /// address: 0x40007824 /// Receive data register - pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit receive data RXDATA: u8, padding0: u1, @@ -23517,7 +23517,7 @@ pub const registers = struct { /// address: 0x40007828 /// Transmit data register - pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TXDR = @intToPtr(*volatile Mmio(32, packed struct { /// 8-bit transmit data TXDATA: u8, padding0: u1, @@ -23552,7 +23552,7 @@ pub const registers = struct { /// address: 0x40003000 /// Key register - pub const KR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const KR = @intToPtr(*volatile Mmio(32, packed struct { /// Key value KEY: u16, padding0: u1, @@ -23579,7 +23579,7 @@ pub const registers = struct { /// address: 0x40003008 /// Reload register - pub const RLR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RLR = @intToPtr(*volatile Mmio(32, packed struct { /// Watchdog counter reload /// value RL: u12, @@ -23607,7 +23607,7 @@ pub const registers = struct { /// address: 0x4000300c /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Watchdog prescaler value /// update PVU: u1, @@ -23650,7 +23650,7 @@ pub const registers = struct { /// address: 0x40003010 /// Window register - pub const WINR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const WINR = @intToPtr(*volatile Mmio(32, packed struct { /// Watchdog counter window /// value WIN: u12, @@ -23682,7 +23682,7 @@ pub const registers = struct { /// address: 0x40002c00 /// Control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// 7-bit counter T: u7, /// Activation bit @@ -23715,7 +23715,7 @@ pub const registers = struct { /// address: 0x40002c04 /// Configuration register - pub const CFR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFR = @intToPtr(*volatile Mmio(32, packed struct { /// 7-bit window value W: u7, /// Timer base @@ -23748,7 +23748,7 @@ pub const registers = struct { /// address: 0x40002c08 /// Status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Early wakeup interrupt /// flag EWIF: u1, @@ -23791,7 +23791,7 @@ pub const registers = struct { /// address: 0x40002800 /// time register - pub const TR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR = @intToPtr(*volatile Mmio(32, packed struct { /// Second units in BCD format SU: u4, /// Second tens in BCD format @@ -23821,7 +23821,7 @@ pub const registers = struct { /// address: 0x40002804 /// date register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// Date units in BCD format DU: u4, /// Date tens in BCD format @@ -23850,7 +23850,7 @@ pub const registers = struct { /// address: 0x40002808 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Wakeup clock selection WCKSEL: u3, /// Time-stamp event active @@ -23913,7 +23913,7 @@ pub const registers = struct { /// address: 0x4000280c /// initialization and status /// register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// Alarm A write flag ALRAWF: u1, /// Alarm B write flag @@ -23968,7 +23968,7 @@ pub const registers = struct { /// address: 0x40002810 /// prescaler register - pub const PRER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PRER = @intToPtr(*volatile Mmio(32, packed struct { /// Synchronous prescaler /// factor PREDIV_S: u15, @@ -23989,7 +23989,7 @@ pub const registers = struct { /// address: 0x40002814 /// wakeup timer register - pub const WUTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const WUTR = @intToPtr(*volatile Mmio(32, packed struct { /// Wakeup auto-reload value /// bits WUT: u16, @@ -24013,7 +24013,7 @@ pub const registers = struct { /// address: 0x4000281c /// alarm A register - pub const ALRMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ALRMAR = @intToPtr(*volatile Mmio(32, packed struct { /// Second units in BCD format SU: u4, /// Second tens in BCD format @@ -24047,7 +24047,7 @@ pub const registers = struct { /// address: 0x40002820 /// alarm B register - pub const ALRMBR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ALRMBR = @intToPtr(*volatile Mmio(32, packed struct { /// Second units in BCD format SU: u4, /// Second tens in BCD format @@ -24081,7 +24081,7 @@ pub const registers = struct { /// address: 0x40002824 /// write protection register - pub const WPR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const WPR = @intToPtr(*volatile Mmio(32, packed struct { /// Write protection key KEY: u8, padding0: u1, @@ -24112,7 +24112,7 @@ pub const registers = struct { /// address: 0x40002828 /// sub second register - pub const SSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SSR = @intToPtr(*volatile Mmio(32, packed struct { /// Sub second value SS: u16, padding0: u1, @@ -24135,7 +24135,7 @@ pub const registers = struct { /// address: 0x4000282c /// shift control register - pub const SHIFTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHIFTR = @intToPtr(*volatile Mmio(32, packed struct { /// Subtract a fraction of a /// second SUBFS: u15, @@ -24161,7 +24161,7 @@ pub const registers = struct { /// address: 0x40002830 /// time stamp time register - pub const TSTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TSTR = @intToPtr(*volatile Mmio(32, packed struct { /// Second units in BCD format SU: u4, /// Second tens in BCD format @@ -24191,7 +24191,7 @@ pub const registers = struct { /// address: 0x40002834 /// time stamp date register - pub const TSDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TSDR = @intToPtr(*volatile Mmio(32, packed struct { /// Date units in BCD format DU: u4, /// Date tens in BCD format @@ -24224,7 +24224,7 @@ pub const registers = struct { /// address: 0x40002838 /// timestamp sub second register - pub const TSSSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TSSSR = @intToPtr(*volatile Mmio(32, packed struct { /// Sub second value SS: u16, padding0: u1, @@ -24247,7 +24247,7 @@ pub const registers = struct { /// address: 0x4000283c /// calibration register - pub const CALR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALR = @intToPtr(*volatile Mmio(32, packed struct { /// Calibration minus CALM: u9, reserved0: u1, @@ -24284,7 +24284,7 @@ pub const registers = struct { /// address: 0x40002840 /// tamper and alternate function configuration /// register - pub const TAFCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TAFCR = @intToPtr(*volatile Mmio(32, packed struct { /// Tamper 1 detection enable TAMP1E: u1, /// Active level for tamper 1 @@ -24336,7 +24336,7 @@ pub const registers = struct { /// address: 0x40002844 /// alarm A sub second register - pub const ALRMASSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ALRMASSR = @intToPtr(*volatile Mmio(32, packed struct { /// Sub seconds value SS: u15, reserved0: u1, @@ -24359,7 +24359,7 @@ pub const registers = struct { /// address: 0x40002848 /// alarm B sub second register - pub const ALRMBSSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ALRMBSSR = @intToPtr(*volatile Mmio(32, packed struct { /// Sub seconds value SS: u15, reserved0: u1, @@ -24382,224 +24382,224 @@ pub const registers = struct { /// address: 0x40002850 /// backup register - pub const BKP0R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP0R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x50); /// address: 0x40002854 /// backup register - pub const BKP1R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP1R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x54); /// address: 0x40002858 /// backup register - pub const BKP2R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP2R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x58); /// address: 0x4000285c /// backup register - pub const BKP3R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP3R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x5c); /// address: 0x40002860 /// backup register - pub const BKP4R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP4R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x60); /// address: 0x40002864 /// backup register - pub const BKP5R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP5R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x64); /// address: 0x40002868 /// backup register - pub const BKP6R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP6R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x68); /// address: 0x4000286c /// backup register - pub const BKP7R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP7R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x6c); /// address: 0x40002870 /// backup register - pub const BKP8R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP8R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x70); /// address: 0x40002874 /// backup register - pub const BKP9R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP9R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x74); /// address: 0x40002878 /// backup register - pub const BKP10R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP10R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x78); /// address: 0x4000287c /// backup register - pub const BKP11R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP11R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x7c); /// address: 0x40002880 /// backup register - pub const BKP12R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP12R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x80); /// address: 0x40002884 /// backup register - pub const BKP13R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP13R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x84); /// address: 0x40002888 /// backup register - pub const BKP14R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP14R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x88); /// address: 0x4000288c /// backup register - pub const BKP15R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP15R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x8c); /// address: 0x40002890 /// backup register - pub const BKP16R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP16R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x90); /// address: 0x40002894 /// backup register - pub const BKP17R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP17R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x94); /// address: 0x40002898 /// backup register - pub const BKP18R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP18R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x98); /// address: 0x4000289c /// backup register - pub const BKP19R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP19R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0x9c); /// address: 0x400028a0 /// backup register - pub const BKP20R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP20R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xa0); /// address: 0x400028a4 /// backup register - pub const BKP21R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP21R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xa4); /// address: 0x400028a8 /// backup register - pub const BKP22R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP22R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xa8); /// address: 0x400028ac /// backup register - pub const BKP23R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP23R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xac); /// address: 0x400028b0 /// backup register - pub const BKP24R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP24R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xb0); /// address: 0x400028b4 /// backup register - pub const BKP25R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP25R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xb4); /// address: 0x400028b8 /// backup register - pub const BKP26R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP26R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xb8); /// address: 0x400028bc /// backup register - pub const BKP27R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP27R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xbc); /// address: 0x400028c0 /// backup register - pub const BKP28R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP28R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xc0); /// address: 0x400028c4 /// backup register - pub const BKP29R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP29R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xc4); /// address: 0x400028c8 /// backup register - pub const BKP30R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP30R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xc8); /// address: 0x400028cc /// backup register - pub const BKP31R = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BKP31R = @intToPtr(*volatile Mmio(32, packed struct { /// BKP BKP: u32, }), base_address + 0xcc); @@ -24610,7 +24610,7 @@ pub const registers = struct { /// address: 0x40001000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -24653,7 +24653,7 @@ pub const registers = struct { /// address: 0x40001004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -24689,7 +24689,7 @@ pub const registers = struct { /// address: 0x4000100c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, reserved0: u1, @@ -24728,7 +24728,7 @@ pub const registers = struct { /// address: 0x40001010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, padding0: u1, @@ -24766,7 +24766,7 @@ pub const registers = struct { /// address: 0x40001014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, padding0: u1, @@ -24804,7 +24804,7 @@ pub const registers = struct { /// address: 0x40001024 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// Low counter value CNT: u16, reserved0: u1, @@ -24839,7 +24839,7 @@ pub const registers = struct { /// address: 0x40001400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -24882,7 +24882,7 @@ pub const registers = struct { /// address: 0x40001404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -24918,7 +24918,7 @@ pub const registers = struct { /// address: 0x4000140c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, reserved0: u1, @@ -24957,7 +24957,7 @@ pub const registers = struct { /// address: 0x40001410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, padding0: u1, @@ -24995,7 +24995,7 @@ pub const registers = struct { /// address: 0x40001414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, padding0: u1, @@ -25033,7 +25033,7 @@ pub const registers = struct { /// address: 0x40001424 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// Low counter value CNT: u16, reserved0: u1, @@ -25069,7 +25069,7 @@ pub const registers = struct { /// address: 0x40007400 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 enable EN1: u1, /// DAC channel1 output buffer @@ -25122,7 +25122,7 @@ pub const registers = struct { /// address: 0x40007404 /// software trigger register - pub const SWTRIGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SWTRIGR = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 software /// trigger SWTRIG1: u1, @@ -25164,7 +25164,7 @@ pub const registers = struct { /// address: 0x40007408 /// channel1 12-bit right-aligned data holding /// register - pub const DHR12R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12R1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 12-bit right-aligned /// data DACC1DHR: u12, @@ -25193,7 +25193,7 @@ pub const registers = struct { /// address: 0x4000740c /// channel1 12-bit left aligned data holding /// register - pub const DHR12L1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12L1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -25222,7 +25222,7 @@ pub const registers = struct { /// address: 0x40007410 /// channel1 8-bit right aligned data holding /// register - pub const DHR8R1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8R1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 8-bit right-aligned /// data DACC1DHR: u8, @@ -25255,7 +25255,7 @@ pub const registers = struct { /// address: 0x40007414 /// channel2 12-bit right aligned data holding /// register - pub const DHR12R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12R2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 12-bit right-aligned /// data DACC2DHR: u12, @@ -25284,7 +25284,7 @@ pub const registers = struct { /// address: 0x40007418 /// channel2 12-bit left aligned data holding /// register - pub const DHR12L2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12L2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -25313,7 +25313,7 @@ pub const registers = struct { /// address: 0x4000741c /// channel2 8-bit right-aligned data holding /// register - pub const DHR8R2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8R2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 8-bit right-aligned /// data DACC2DHR: u8, @@ -25346,7 +25346,7 @@ pub const registers = struct { /// address: 0x40007420 /// Dual DAC 12-bit right-aligned data holding /// register - pub const DHR12RD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12RD = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 12-bit right-aligned /// data DACC1DHR: u12, @@ -25366,7 +25366,7 @@ pub const registers = struct { /// address: 0x40007424 /// DUAL DAC 12-bit left aligned data holding /// register - pub const DHR12LD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR12LD = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -25386,7 +25386,7 @@ pub const registers = struct { /// address: 0x40007428 /// DUAL DAC 8-bit right aligned data holding /// register - pub const DHR8RD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DHR8RD = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 8-bit right-aligned /// data DACC1DHR: u8, @@ -25413,7 +25413,7 @@ pub const registers = struct { /// address: 0x4000742c /// channel1 data output register - pub const DOR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DOR1 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel1 data output DACC1DOR: u12, padding0: u1, @@ -25440,7 +25440,7 @@ pub const registers = struct { /// address: 0x40007430 /// channel2 data output register - pub const DOR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DOR2 = @intToPtr(*volatile Mmio(32, packed struct { /// DAC channel2 data output DACC2DOR: u12, padding0: u1, @@ -25467,7 +25467,7 @@ pub const registers = struct { /// address: 0x40007434 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -25512,7 +25512,7 @@ pub const registers = struct { /// address: 0xe0042000 /// MCU Device ID Code Register - pub const IDCODE = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IDCODE = @intToPtr(*volatile Mmio(32, packed struct { /// Device Identifier DEV_ID: u12, reserved0: u1, @@ -25526,7 +25526,7 @@ pub const registers = struct { /// address: 0xe0042004 /// Debug MCU Configuration /// Register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// Debug Sleep mode DBG_SLEEP: u1, /// Debug Stop Mode @@ -25569,7 +25569,7 @@ pub const registers = struct { /// address: 0xe0042008 /// APB Low Freeze Register - pub const APB1FZ = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB1FZ = @intToPtr(*volatile Mmio(32, packed struct { /// Debug Timer 2 stopped when Core is /// halted DBG_TIM2_STOP: u1, @@ -25638,7 +25638,7 @@ pub const registers = struct { /// address: 0xe004200c /// APB High Freeze Register - pub const APB2FZ = @intToPtr(*volatile Mmio(32, packed struct{ + pub const APB2FZ = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Debug Timer 15 stopped when Core is @@ -25687,7 +25687,7 @@ pub const registers = struct { /// address: 0x40012c00 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -25732,7 +25732,7 @@ pub const registers = struct { /// address: 0x40012c04 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -25782,7 +25782,7 @@ pub const registers = struct { /// address: 0x40012c08 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -25820,7 +25820,7 @@ pub const registers = struct { /// address: 0x40012c0c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -25880,7 +25880,7 @@ pub const registers = struct { /// address: 0x40012c10 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -25942,7 +25942,7 @@ pub const registers = struct { /// address: 0x40012c14 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -25994,7 +25994,7 @@ pub const registers = struct { /// address: 0x40012c18 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -26048,7 +26048,7 @@ pub const registers = struct { /// address: 0x40012c18 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -26084,7 +26084,7 @@ pub const registers = struct { /// address: 0x40012c1c /// capture/compare mode register (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -26138,7 +26138,7 @@ pub const registers = struct { /// address: 0x40012c1c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare 3 /// selection CC3S: u2, @@ -26174,7 +26174,7 @@ pub const registers = struct { /// address: 0x40012c20 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -26249,7 +26249,7 @@ pub const registers = struct { /// address: 0x40012c24 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -26281,7 +26281,7 @@ pub const registers = struct { /// address: 0x40012c30 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u16, padding0: u1, @@ -26320,7 +26320,7 @@ pub const registers = struct { /// address: 0x40012c44 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -26357,7 +26357,7 @@ pub const registers = struct { /// address: 0x40012c48 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -26388,7 +26388,7 @@ pub const registers = struct { /// address: 0x40012c4c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -26413,7 +26413,7 @@ pub const registers = struct { /// address: 0x40012c54 /// capture/compare mode register 3 (output /// mode) - pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Output compare 5 fast @@ -26464,7 +26464,7 @@ pub const registers = struct { /// address: 0x40012c58 /// capture/compare register 5 - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 5 value CCR5: u16, reserved0: u1, @@ -26497,7 +26497,7 @@ pub const registers = struct { /// address: 0x40012c60 /// option registers - pub const OR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OR = @intToPtr(*volatile Mmio(32, packed struct { /// TIM1_ETR_ADC1 remapping /// capability TIM1_ETR_ADC1_RMP: u2, @@ -26539,7 +26539,7 @@ pub const registers = struct { /// address: 0x40015000 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -26584,7 +26584,7 @@ pub const registers = struct { /// address: 0x40015004 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -26634,7 +26634,7 @@ pub const registers = struct { /// address: 0x40015008 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -26672,7 +26672,7 @@ pub const registers = struct { /// address: 0x4001500c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -26732,7 +26732,7 @@ pub const registers = struct { /// address: 0x40015010 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -26794,7 +26794,7 @@ pub const registers = struct { /// address: 0x40015014 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -26846,7 +26846,7 @@ pub const registers = struct { /// address: 0x40015018 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -26900,7 +26900,7 @@ pub const registers = struct { /// address: 0x40015018 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -26936,7 +26936,7 @@ pub const registers = struct { /// address: 0x4001501c /// capture/compare mode register (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -26990,7 +26990,7 @@ pub const registers = struct { /// address: 0x4001501c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare 3 /// selection CC3S: u2, @@ -27026,7 +27026,7 @@ pub const registers = struct { /// address: 0x40015020 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -27101,7 +27101,7 @@ pub const registers = struct { /// address: 0x40015024 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -27133,7 +27133,7 @@ pub const registers = struct { /// address: 0x40015030 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u16, padding0: u1, @@ -27172,7 +27172,7 @@ pub const registers = struct { /// address: 0x40015044 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -27209,7 +27209,7 @@ pub const registers = struct { /// address: 0x40015048 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -27240,7 +27240,7 @@ pub const registers = struct { /// address: 0x4001504c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -27265,7 +27265,7 @@ pub const registers = struct { /// address: 0x40015054 /// capture/compare mode register 3 (output /// mode) - pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Output compare 5 fast @@ -27316,7 +27316,7 @@ pub const registers = struct { /// address: 0x40015058 /// capture/compare register 5 - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 5 value CCR5: u16, reserved0: u1, @@ -27349,7 +27349,7 @@ pub const registers = struct { /// address: 0x40015060 /// option registers - pub const OR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OR = @intToPtr(*volatile Mmio(32, packed struct { /// TIM1_ETR_ADC1 remapping /// capability TIM1_ETR_ADC1_RMP: u2, @@ -27392,7 +27392,7 @@ pub const registers = struct { /// address: 0x40013400 /// control register 1 - pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable CEN: u1, /// Update disable @@ -27437,7 +27437,7 @@ pub const registers = struct { /// address: 0x40013404 /// control register 2 - pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare preloaded /// control CCPC: u1, @@ -27487,7 +27487,7 @@ pub const registers = struct { /// address: 0x40013408 /// slave mode control register - pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMCR = @intToPtr(*volatile Mmio(32, packed struct { /// Slave mode selection SMS: u3, /// OCREF clear selection @@ -27525,7 +27525,7 @@ pub const registers = struct { /// address: 0x4001340c /// DMA/Interrupt enable register - pub const DIER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIER = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt enable UIE: u1, /// Capture/Compare 1 interrupt @@ -27585,7 +27585,7 @@ pub const registers = struct { /// address: 0x40013410 /// status register - pub const SR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR = @intToPtr(*volatile Mmio(32, packed struct { /// Update interrupt flag UIF: u1, /// Capture/compare 1 interrupt @@ -27647,7 +27647,7 @@ pub const registers = struct { /// address: 0x40013414 /// event generation register - pub const EGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const EGR = @intToPtr(*volatile Mmio(32, packed struct { /// Update generation UG: u1, /// Capture/compare 1 @@ -27699,7 +27699,7 @@ pub const registers = struct { /// address: 0x40013418 /// capture/compare mode register (output /// mode) - pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -27753,7 +27753,7 @@ pub const registers = struct { /// address: 0x40013418 /// capture/compare mode register 1 (input /// mode) - pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR1_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 /// selection CC1S: u2, @@ -27789,7 +27789,7 @@ pub const registers = struct { /// address: 0x4001341c /// capture/compare mode register (output /// mode) - pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Output = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 3 /// selection CC3S: u2, @@ -27843,7 +27843,7 @@ pub const registers = struct { /// address: 0x4001341c /// capture/compare mode register 2 (input /// mode) - pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR2_Input = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/compare 3 /// selection CC3S: u2, @@ -27879,7 +27879,7 @@ pub const registers = struct { /// address: 0x40013420 /// capture/compare enable /// register - pub const CCER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCER = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 1 output /// enable CC1E: u1, @@ -27954,7 +27954,7 @@ pub const registers = struct { /// address: 0x40013424 /// counter - pub const CNT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CNT = @intToPtr(*volatile Mmio(32, packed struct { /// counter value CNT: u16, reserved0: u1, @@ -27986,7 +27986,7 @@ pub const registers = struct { /// address: 0x40013430 /// repetition counter register - pub const RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const RCR = @intToPtr(*volatile Mmio(32, packed struct { /// Repetition counter value REP: u16, padding0: u1, @@ -28025,7 +28025,7 @@ pub const registers = struct { /// address: 0x40013444 /// break and dead-time register - pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BDTR = @intToPtr(*volatile Mmio(32, packed struct { /// Dead-time generator setup DTG: u8, /// Lock configuration @@ -28062,7 +28062,7 @@ pub const registers = struct { /// address: 0x40013448 /// DMA control register - pub const DCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DCR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA base address DBA: u5, reserved0: u1, @@ -28093,7 +28093,7 @@ pub const registers = struct { /// address: 0x4001344c /// DMA address for full transfer - pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DMAR = @intToPtr(*volatile Mmio(32, packed struct { /// DMA register for burst /// accesses DMAB: u16, @@ -28118,7 +28118,7 @@ pub const registers = struct { /// address: 0x40013454 /// capture/compare mode register 3 (output /// mode) - pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCMR3_Output = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, /// Output compare 5 fast @@ -28169,7 +28169,7 @@ pub const registers = struct { /// address: 0x40013458 /// capture/compare register 5 - pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR5 = @intToPtr(*volatile Mmio(32, packed struct { /// Capture/Compare 5 value CCR5: u16, reserved0: u1, @@ -28202,7 +28202,7 @@ pub const registers = struct { /// address: 0x40013460 /// option registers - pub const OR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OR = @intToPtr(*volatile Mmio(32, packed struct { /// TIM8_ETR_ADC2 remapping /// capability TIM8_ETR_ADC2_RMP: u2, @@ -28245,7 +28245,7 @@ pub const registers = struct { /// address: 0x50000000 /// interrupt and status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDY ADRDY: u1, /// EOSMP @@ -28293,7 +28293,7 @@ pub const registers = struct { /// address: 0x50000004 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDYIE ADRDYIE: u1, /// EOSMPIE @@ -28341,7 +28341,7 @@ pub const registers = struct { /// address: 0x50000008 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// ADEN ADEN: u1, /// ADDIS @@ -28388,7 +28388,7 @@ pub const registers = struct { /// address: 0x5000000c /// configuration register - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// DMAEN DMAEN: u1, /// DMACFG @@ -28433,7 +28433,7 @@ pub const registers = struct { /// address: 0x50000014 /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -28461,7 +28461,7 @@ pub const registers = struct { /// address: 0x50000018 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SMP10 SMP10: u3, /// SMP11 @@ -28489,7 +28489,7 @@ pub const registers = struct { /// address: 0x50000020 /// watchdog threshold register 1 - pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct { /// LT1 LT1: u12, reserved0: u1, @@ -28506,7 +28506,7 @@ pub const registers = struct { /// address: 0x50000024 /// watchdog threshold register - pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct { /// LT2 LT2: u8, reserved0: u1, @@ -28531,7 +28531,7 @@ pub const registers = struct { /// address: 0x50000028 /// watchdog threshold register 3 - pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct { /// LT3 LT3: u8, reserved0: u1, @@ -28556,7 +28556,7 @@ pub const registers = struct { /// address: 0x50000030 /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// L3 L3: u4, reserved0: u1, @@ -28579,7 +28579,7 @@ pub const registers = struct { /// address: 0x50000034 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ5 SQ5: u5, reserved0: u1, @@ -28601,7 +28601,7 @@ pub const registers = struct { /// address: 0x50000038 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ10 SQ10: u5, reserved0: u1, @@ -28623,7 +28623,7 @@ pub const registers = struct { /// address: 0x5000003c /// regular sequence register 4 - pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ15 SQ15: u5, reserved0: u1, @@ -28654,7 +28654,7 @@ pub const registers = struct { /// address: 0x50000040 /// regular Data Register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// regularDATA regularDATA: u16, padding0: u1, @@ -28677,7 +28677,7 @@ pub const registers = struct { /// address: 0x5000004c /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// JL JL: u2, /// JEXTSEL @@ -28700,7 +28700,7 @@ pub const registers = struct { /// address: 0x50000060 /// offset register 1 - pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET1 OFFSET1: u12, reserved0: u1, @@ -28725,7 +28725,7 @@ pub const registers = struct { /// address: 0x50000064 /// offset register 2 - pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET2 OFFSET2: u12, reserved0: u1, @@ -28750,7 +28750,7 @@ pub const registers = struct { /// address: 0x50000068 /// offset register 3 - pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET3 OFFSET3: u12, reserved0: u1, @@ -28775,7 +28775,7 @@ pub const registers = struct { /// address: 0x5000006c /// offset register 4 - pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET4 OFFSET4: u12, reserved0: u1, @@ -28800,7 +28800,7 @@ pub const registers = struct { /// address: 0x50000080 /// injected data register 1 - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA1 JDATA1: u16, padding0: u1, @@ -28823,7 +28823,7 @@ pub const registers = struct { /// address: 0x50000084 /// injected data register 2 - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA2 JDATA2: u16, padding0: u1, @@ -28846,7 +28846,7 @@ pub const registers = struct { /// address: 0x50000088 /// injected data register 3 - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA3 JDATA3: u16, padding0: u1, @@ -28869,7 +28869,7 @@ pub const registers = struct { /// address: 0x5000008c /// injected data register 4 - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA4 JDATA4: u16, padding0: u1, @@ -28893,7 +28893,7 @@ pub const registers = struct { /// address: 0x500000a0 /// Analog Watchdog 2 Configuration /// Register - pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD2CH AWD2CH: u18, @@ -28915,7 +28915,7 @@ pub const registers = struct { /// address: 0x500000a4 /// Analog Watchdog 3 Configuration /// Register - pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD3CH AWD3CH: u18, @@ -28937,7 +28937,7 @@ pub const registers = struct { /// address: 0x500000b0 /// Differential Mode Selection Register /// 2 - pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Differential mode for channels 15 to /// 1 @@ -28962,7 +28962,7 @@ pub const registers = struct { /// address: 0x500000b4 /// Calibration Factors - pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct { /// CALFACT_S CALFACT_S: u7, reserved0: u1, @@ -28992,7 +28992,7 @@ pub const registers = struct { /// address: 0x50000100 /// interrupt and status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDY ADRDY: u1, /// EOSMP @@ -29040,7 +29040,7 @@ pub const registers = struct { /// address: 0x50000104 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDYIE ADRDYIE: u1, /// EOSMPIE @@ -29088,7 +29088,7 @@ pub const registers = struct { /// address: 0x50000108 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// ADEN ADEN: u1, /// ADDIS @@ -29135,7 +29135,7 @@ pub const registers = struct { /// address: 0x5000010c /// configuration register - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// DMAEN DMAEN: u1, /// DMACFG @@ -29180,7 +29180,7 @@ pub const registers = struct { /// address: 0x50000114 /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -29208,7 +29208,7 @@ pub const registers = struct { /// address: 0x50000118 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SMP10 SMP10: u3, /// SMP11 @@ -29236,7 +29236,7 @@ pub const registers = struct { /// address: 0x50000120 /// watchdog threshold register 1 - pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct { /// LT1 LT1: u12, reserved0: u1, @@ -29253,7 +29253,7 @@ pub const registers = struct { /// address: 0x50000124 /// watchdog threshold register - pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct { /// LT2 LT2: u8, reserved0: u1, @@ -29278,7 +29278,7 @@ pub const registers = struct { /// address: 0x50000128 /// watchdog threshold register 3 - pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct { /// LT3 LT3: u8, reserved0: u1, @@ -29303,7 +29303,7 @@ pub const registers = struct { /// address: 0x50000130 /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// L3 L3: u4, reserved0: u1, @@ -29326,7 +29326,7 @@ pub const registers = struct { /// address: 0x50000134 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ5 SQ5: u5, reserved0: u1, @@ -29348,7 +29348,7 @@ pub const registers = struct { /// address: 0x50000138 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ10 SQ10: u5, reserved0: u1, @@ -29370,7 +29370,7 @@ pub const registers = struct { /// address: 0x5000013c /// regular sequence register 4 - pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ15 SQ15: u5, reserved0: u1, @@ -29401,7 +29401,7 @@ pub const registers = struct { /// address: 0x50000140 /// regular Data Register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// regularDATA regularDATA: u16, padding0: u1, @@ -29424,7 +29424,7 @@ pub const registers = struct { /// address: 0x5000014c /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// JL JL: u2, /// JEXTSEL @@ -29447,7 +29447,7 @@ pub const registers = struct { /// address: 0x50000160 /// offset register 1 - pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET1 OFFSET1: u12, reserved0: u1, @@ -29472,7 +29472,7 @@ pub const registers = struct { /// address: 0x50000164 /// offset register 2 - pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET2 OFFSET2: u12, reserved0: u1, @@ -29497,7 +29497,7 @@ pub const registers = struct { /// address: 0x50000168 /// offset register 3 - pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET3 OFFSET3: u12, reserved0: u1, @@ -29522,7 +29522,7 @@ pub const registers = struct { /// address: 0x5000016c /// offset register 4 - pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET4 OFFSET4: u12, reserved0: u1, @@ -29547,7 +29547,7 @@ pub const registers = struct { /// address: 0x50000180 /// injected data register 1 - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA1 JDATA1: u16, padding0: u1, @@ -29570,7 +29570,7 @@ pub const registers = struct { /// address: 0x50000184 /// injected data register 2 - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA2 JDATA2: u16, padding0: u1, @@ -29593,7 +29593,7 @@ pub const registers = struct { /// address: 0x50000188 /// injected data register 3 - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA3 JDATA3: u16, padding0: u1, @@ -29616,7 +29616,7 @@ pub const registers = struct { /// address: 0x5000018c /// injected data register 4 - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA4 JDATA4: u16, padding0: u1, @@ -29640,7 +29640,7 @@ pub const registers = struct { /// address: 0x500001a0 /// Analog Watchdog 2 Configuration /// Register - pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD2CH AWD2CH: u18, @@ -29662,7 +29662,7 @@ pub const registers = struct { /// address: 0x500001a4 /// Analog Watchdog 3 Configuration /// Register - pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD3CH AWD3CH: u18, @@ -29684,7 +29684,7 @@ pub const registers = struct { /// address: 0x500001b0 /// Differential Mode Selection Register /// 2 - pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Differential mode for channels 15 to /// 1 @@ -29709,7 +29709,7 @@ pub const registers = struct { /// address: 0x500001b4 /// Calibration Factors - pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct { /// CALFACT_S CALFACT_S: u7, reserved0: u1, @@ -29739,7 +29739,7 @@ pub const registers = struct { /// address: 0x50000400 /// interrupt and status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDY ADRDY: u1, /// EOSMP @@ -29787,7 +29787,7 @@ pub const registers = struct { /// address: 0x50000404 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDYIE ADRDYIE: u1, /// EOSMPIE @@ -29835,7 +29835,7 @@ pub const registers = struct { /// address: 0x50000408 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// ADEN ADEN: u1, /// ADDIS @@ -29882,7 +29882,7 @@ pub const registers = struct { /// address: 0x5000040c /// configuration register - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// DMAEN DMAEN: u1, /// DMACFG @@ -29927,7 +29927,7 @@ pub const registers = struct { /// address: 0x50000414 /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -29955,7 +29955,7 @@ pub const registers = struct { /// address: 0x50000418 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SMP10 SMP10: u3, /// SMP11 @@ -29983,7 +29983,7 @@ pub const registers = struct { /// address: 0x50000420 /// watchdog threshold register 1 - pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct { /// LT1 LT1: u12, reserved0: u1, @@ -30000,7 +30000,7 @@ pub const registers = struct { /// address: 0x50000424 /// watchdog threshold register - pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct { /// LT2 LT2: u8, reserved0: u1, @@ -30025,7 +30025,7 @@ pub const registers = struct { /// address: 0x50000428 /// watchdog threshold register 3 - pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct { /// LT3 LT3: u8, reserved0: u1, @@ -30050,7 +30050,7 @@ pub const registers = struct { /// address: 0x50000430 /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// L3 L3: u4, reserved0: u1, @@ -30073,7 +30073,7 @@ pub const registers = struct { /// address: 0x50000434 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ5 SQ5: u5, reserved0: u1, @@ -30095,7 +30095,7 @@ pub const registers = struct { /// address: 0x50000438 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ10 SQ10: u5, reserved0: u1, @@ -30117,7 +30117,7 @@ pub const registers = struct { /// address: 0x5000043c /// regular sequence register 4 - pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ15 SQ15: u5, reserved0: u1, @@ -30148,7 +30148,7 @@ pub const registers = struct { /// address: 0x50000440 /// regular Data Register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// regularDATA regularDATA: u16, padding0: u1, @@ -30171,7 +30171,7 @@ pub const registers = struct { /// address: 0x5000044c /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// JL JL: u2, /// JEXTSEL @@ -30194,7 +30194,7 @@ pub const registers = struct { /// address: 0x50000460 /// offset register 1 - pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET1 OFFSET1: u12, reserved0: u1, @@ -30219,7 +30219,7 @@ pub const registers = struct { /// address: 0x50000464 /// offset register 2 - pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET2 OFFSET2: u12, reserved0: u1, @@ -30244,7 +30244,7 @@ pub const registers = struct { /// address: 0x50000468 /// offset register 3 - pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET3 OFFSET3: u12, reserved0: u1, @@ -30269,7 +30269,7 @@ pub const registers = struct { /// address: 0x5000046c /// offset register 4 - pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET4 OFFSET4: u12, reserved0: u1, @@ -30294,7 +30294,7 @@ pub const registers = struct { /// address: 0x50000480 /// injected data register 1 - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA1 JDATA1: u16, padding0: u1, @@ -30317,7 +30317,7 @@ pub const registers = struct { /// address: 0x50000484 /// injected data register 2 - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA2 JDATA2: u16, padding0: u1, @@ -30340,7 +30340,7 @@ pub const registers = struct { /// address: 0x50000488 /// injected data register 3 - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA3 JDATA3: u16, padding0: u1, @@ -30363,7 +30363,7 @@ pub const registers = struct { /// address: 0x5000048c /// injected data register 4 - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA4 JDATA4: u16, padding0: u1, @@ -30387,7 +30387,7 @@ pub const registers = struct { /// address: 0x500004a0 /// Analog Watchdog 2 Configuration /// Register - pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD2CH AWD2CH: u18, @@ -30409,7 +30409,7 @@ pub const registers = struct { /// address: 0x500004a4 /// Analog Watchdog 3 Configuration /// Register - pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD3CH AWD3CH: u18, @@ -30431,7 +30431,7 @@ pub const registers = struct { /// address: 0x500004b0 /// Differential Mode Selection Register /// 2 - pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Differential mode for channels 15 to /// 1 @@ -30456,7 +30456,7 @@ pub const registers = struct { /// address: 0x500004b4 /// Calibration Factors - pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct { /// CALFACT_S CALFACT_S: u7, reserved0: u1, @@ -30486,7 +30486,7 @@ pub const registers = struct { /// address: 0x50000500 /// interrupt and status register - pub const ISR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISR = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDY ADRDY: u1, /// EOSMP @@ -30534,7 +30534,7 @@ pub const registers = struct { /// address: 0x50000504 /// interrupt enable register - pub const IER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IER = @intToPtr(*volatile Mmio(32, packed struct { /// ADRDYIE ADRDYIE: u1, /// EOSMPIE @@ -30582,7 +30582,7 @@ pub const registers = struct { /// address: 0x50000508 /// control register - pub const CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CR = @intToPtr(*volatile Mmio(32, packed struct { /// ADEN ADEN: u1, /// ADDIS @@ -30629,7 +30629,7 @@ pub const registers = struct { /// address: 0x5000050c /// configuration register - pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFGR = @intToPtr(*volatile Mmio(32, packed struct { /// DMAEN DMAEN: u1, /// DMACFG @@ -30674,7 +30674,7 @@ pub const registers = struct { /// address: 0x50000514 /// sample time register 1 - pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR1 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -30702,7 +30702,7 @@ pub const registers = struct { /// address: 0x50000518 /// sample time register 2 - pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SMPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SMP10 SMP10: u3, /// SMP11 @@ -30730,7 +30730,7 @@ pub const registers = struct { /// address: 0x50000520 /// watchdog threshold register 1 - pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR1 = @intToPtr(*volatile Mmio(32, packed struct { /// LT1 LT1: u12, reserved0: u1, @@ -30747,7 +30747,7 @@ pub const registers = struct { /// address: 0x50000524 /// watchdog threshold register - pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR2 = @intToPtr(*volatile Mmio(32, packed struct { /// LT2 LT2: u8, reserved0: u1, @@ -30772,7 +30772,7 @@ pub const registers = struct { /// address: 0x50000528 /// watchdog threshold register 3 - pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const TR3 = @intToPtr(*volatile Mmio(32, packed struct { /// LT3 LT3: u8, reserved0: u1, @@ -30797,7 +30797,7 @@ pub const registers = struct { /// address: 0x50000530 /// regular sequence register 1 - pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR1 = @intToPtr(*volatile Mmio(32, packed struct { /// L3 L3: u4, reserved0: u1, @@ -30820,7 +30820,7 @@ pub const registers = struct { /// address: 0x50000534 /// regular sequence register 2 - pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ5 SQ5: u5, reserved0: u1, @@ -30842,7 +30842,7 @@ pub const registers = struct { /// address: 0x50000538 /// regular sequence register 3 - pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR3 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ10 SQ10: u5, reserved0: u1, @@ -30864,7 +30864,7 @@ pub const registers = struct { /// address: 0x5000053c /// regular sequence register 4 - pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SQR4 = @intToPtr(*volatile Mmio(32, packed struct { /// SQ15 SQ15: u5, reserved0: u1, @@ -30895,7 +30895,7 @@ pub const registers = struct { /// address: 0x50000540 /// regular Data Register - pub const DR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DR = @intToPtr(*volatile Mmio(32, packed struct { /// regularDATA regularDATA: u16, padding0: u1, @@ -30918,7 +30918,7 @@ pub const registers = struct { /// address: 0x5000054c /// injected sequence register - pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JSQR = @intToPtr(*volatile Mmio(32, packed struct { /// JL JL: u2, /// JEXTSEL @@ -30941,7 +30941,7 @@ pub const registers = struct { /// address: 0x50000560 /// offset register 1 - pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR1 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET1 OFFSET1: u12, reserved0: u1, @@ -30966,7 +30966,7 @@ pub const registers = struct { /// address: 0x50000564 /// offset register 2 - pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR2 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET2 OFFSET2: u12, reserved0: u1, @@ -30991,7 +30991,7 @@ pub const registers = struct { /// address: 0x50000568 /// offset register 3 - pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR3 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET3 OFFSET3: u12, reserved0: u1, @@ -31016,7 +31016,7 @@ pub const registers = struct { /// address: 0x5000056c /// offset register 4 - pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OFR4 = @intToPtr(*volatile Mmio(32, packed struct { /// OFFSET4 OFFSET4: u12, reserved0: u1, @@ -31041,7 +31041,7 @@ pub const registers = struct { /// address: 0x50000580 /// injected data register 1 - pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR1 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA1 JDATA1: u16, padding0: u1, @@ -31064,7 +31064,7 @@ pub const registers = struct { /// address: 0x50000584 /// injected data register 2 - pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR2 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA2 JDATA2: u16, padding0: u1, @@ -31087,7 +31087,7 @@ pub const registers = struct { /// address: 0x50000588 /// injected data register 3 - pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR3 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA3 JDATA3: u16, padding0: u1, @@ -31110,7 +31110,7 @@ pub const registers = struct { /// address: 0x5000058c /// injected data register 4 - pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const JDR4 = @intToPtr(*volatile Mmio(32, packed struct { /// JDATA4 JDATA4: u16, padding0: u1, @@ -31134,7 +31134,7 @@ pub const registers = struct { /// address: 0x500005a0 /// Analog Watchdog 2 Configuration /// Register - pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD2CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD2CH AWD2CH: u18, @@ -31156,7 +31156,7 @@ pub const registers = struct { /// address: 0x500005a4 /// Analog Watchdog 3 Configuration /// Register - pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AWD3CR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// AWD3CH AWD3CH: u18, @@ -31178,7 +31178,7 @@ pub const registers = struct { /// address: 0x500005b0 /// Differential Mode Selection Register /// 2 - pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const DIFSEL = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Differential mode for channels 15 to /// 1 @@ -31203,7 +31203,7 @@ pub const registers = struct { /// address: 0x500005b4 /// Calibration Factors - pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALFACT = @intToPtr(*volatile Mmio(32, packed struct { /// CALFACT_S CALFACT_S: u7, reserved0: u1, @@ -31234,7 +31234,7 @@ pub const registers = struct { /// address: 0x50000300 /// ADC Common status register - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// ADDRDY_MST ADDRDY_MST: u1, /// EOSMP_MST @@ -31302,7 +31302,7 @@ pub const registers = struct { /// address: 0x50000308 /// ADC common control register - pub const CCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR = @intToPtr(*volatile Mmio(32, packed struct { /// Multi ADC mode selection MULT: u5, reserved0: u1, @@ -31342,7 +31342,7 @@ pub const registers = struct { /// address: 0x5000030c /// ADC common regular data register for dual /// and triple modes - pub const CDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CDR = @intToPtr(*volatile Mmio(32, packed struct { /// Regular data of the master /// ADC RDATA_MST: u16, @@ -31356,7 +31356,7 @@ pub const registers = struct { /// address: 0x50000700 /// ADC Common status register - pub const CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CSR = @intToPtr(*volatile Mmio(32, packed struct { /// ADDRDY_MST ADDRDY_MST: u1, /// EOSMP_MST @@ -31424,7 +31424,7 @@ pub const registers = struct { /// address: 0x50000708 /// ADC common control register - pub const CCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR = @intToPtr(*volatile Mmio(32, packed struct { /// Multi ADC mode selection MULT: u5, reserved0: u1, @@ -31464,7 +31464,7 @@ pub const registers = struct { /// address: 0x5000070c /// ADC common regular data register for dual /// and triple modes - pub const CDR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CDR = @intToPtr(*volatile Mmio(32, packed struct { /// Regular data of the master /// ADC RDATA_MST: u16, @@ -31480,7 +31480,7 @@ pub const registers = struct { /// address: 0x40010000 /// configuration register 1 - pub const SYSCFG_CFGR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_CFGR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Memory mapping selection /// bits MEM_MODE: u2, @@ -31539,7 +31539,7 @@ pub const registers = struct { /// address: 0x40010008 /// external interrupt configuration register /// 1 - pub const SYSCFG_EXTICR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_EXTICR1 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI 0 configuration bits EXTI0: u4, /// EXTI 1 configuration bits @@ -31569,7 +31569,7 @@ pub const registers = struct { /// address: 0x4001000c /// external interrupt configuration register /// 2 - pub const SYSCFG_EXTICR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_EXTICR2 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI 4 configuration bits EXTI4: u4, /// EXTI 5 configuration bits @@ -31599,7 +31599,7 @@ pub const registers = struct { /// address: 0x40010010 /// external interrupt configuration register /// 3 - pub const SYSCFG_EXTICR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_EXTICR3 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI 8 configuration bits EXTI8: u4, /// EXTI 9 configuration bits @@ -31629,7 +31629,7 @@ pub const registers = struct { /// address: 0x40010014 /// external interrupt configuration register /// 4 - pub const SYSCFG_EXTICR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_EXTICR4 = @intToPtr(*volatile Mmio(32, packed struct { /// EXTI 12 configuration bits EXTI12: u4, /// EXTI 13 configuration bits @@ -31658,7 +31658,7 @@ pub const registers = struct { /// address: 0x40010018 /// configuration register 2 - pub const SYSCFG_CFGR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_CFGR2 = @intToPtr(*volatile Mmio(32, packed struct { /// Cortex-M0 LOCKUP bit enable /// bit LOCUP_LOCK: u1, @@ -31702,7 +31702,7 @@ pub const registers = struct { /// address: 0x40010004 /// CCM SRAM protection register - pub const SYSCFG_RCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SYSCFG_RCR = @intToPtr(*volatile Mmio(32, packed struct { /// CCM SRAM page write protection /// bit PAGE0_WP: u1, @@ -31755,7 +31755,7 @@ pub const registers = struct { /// address: 0x4001001c /// control and status register - pub const COMP1_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP1_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 1 enable COMP1EN: u1, /// COMP1_INP_DAC @@ -31797,7 +31797,7 @@ pub const registers = struct { /// address: 0x40010020 /// control and status register - pub const COMP2_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP2_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 2 enable COMP2EN: u1, reserved0: u1, @@ -31841,7 +31841,7 @@ pub const registers = struct { /// address: 0x40010024 /// control and status register - pub const COMP3_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP3_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 3 enable COMP3EN: u1, reserved0: u1, @@ -31884,7 +31884,7 @@ pub const registers = struct { /// address: 0x40010028 /// control and status register - pub const COMP4_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP4_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 4 enable COMP4EN: u1, reserved0: u1, @@ -31928,7 +31928,7 @@ pub const registers = struct { /// address: 0x4001002c /// control and status register - pub const COMP5_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP5_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 5 enable COMP5EN: u1, reserved0: u1, @@ -31971,7 +31971,7 @@ pub const registers = struct { /// address: 0x40010030 /// control and status register - pub const COMP6_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP6_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 6 enable COMP6EN: u1, reserved0: u1, @@ -32015,7 +32015,7 @@ pub const registers = struct { /// address: 0x40010034 /// control and status register - pub const COMP7_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const COMP7_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// Comparator 7 enable COMP7EN: u1, reserved0: u1, @@ -32058,7 +32058,7 @@ pub const registers = struct { /// address: 0x40010038 /// control register - pub const OPAMP1_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OPAMP1_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// OPAMP1 enable OPAMP1_EN: u1, /// FORCE_VP @@ -32103,7 +32103,7 @@ pub const registers = struct { /// address: 0x4001003c /// control register - pub const OPAMP2_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OPAMP2_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// OPAMP2 enable OPAMP2EN: u1, /// FORCE_VP @@ -32148,7 +32148,7 @@ pub const registers = struct { /// address: 0x40010040 /// control register - pub const OPAMP3_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OPAMP3_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// OPAMP3 enable OPAMP3EN: u1, /// FORCE_VP @@ -32193,7 +32193,7 @@ pub const registers = struct { /// address: 0x40010044 /// control register - pub const OPAMP4_CSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const OPAMP4_CSR = @intToPtr(*volatile Mmio(32, packed struct { /// OPAMP4 enable OPAMP4EN: u1, /// FORCE_VP @@ -32243,7 +32243,7 @@ pub const registers = struct { /// address: 0xa0000400 /// SRAM/NOR-Flash chip-select control register /// 1 - pub const BCR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR1 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -32293,7 +32293,7 @@ pub const registers = struct { /// address: 0xa0000404 /// SRAM/NOR-Flash chip-select timing register /// 1 - pub const BTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32315,7 +32315,7 @@ pub const registers = struct { /// address: 0xa0000408 /// SRAM/NOR-Flash chip-select control register /// 2 - pub const BCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -32365,7 +32365,7 @@ pub const registers = struct { /// address: 0xa000040c /// SRAM/NOR-Flash chip-select timing register /// 2 - pub const BTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32387,7 +32387,7 @@ pub const registers = struct { /// address: 0xa0000410 /// SRAM/NOR-Flash chip-select control register /// 3 - pub const BCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -32437,7 +32437,7 @@ pub const registers = struct { /// address: 0xa0000414 /// SRAM/NOR-Flash chip-select timing register /// 3 - pub const BTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32459,7 +32459,7 @@ pub const registers = struct { /// address: 0xa0000418 /// SRAM/NOR-Flash chip-select control register /// 4 - pub const BCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BCR4 = @intToPtr(*volatile Mmio(32, packed struct { /// MBKEN MBKEN: u1, /// MUXEN @@ -32509,7 +32509,7 @@ pub const registers = struct { /// address: 0xa000041c /// SRAM/NOR-Flash chip-select timing register /// 4 - pub const BTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32531,7 +32531,7 @@ pub const registers = struct { /// address: 0xa0000460 /// PC Card/NAND Flash control register /// 2 - pub const PCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -32568,7 +32568,7 @@ pub const registers = struct { /// address: 0xa0000464 /// FIFO status and interrupt register /// 2 - pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR2 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -32613,7 +32613,7 @@ pub const registers = struct { /// address: 0xa0000468 /// Common memory space timing register /// 2 - pub const PMEM2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM2 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -32627,7 +32627,7 @@ pub const registers = struct { /// address: 0xa000046c /// Attribute memory space timing register /// 2 - pub const PATT2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT2 = @intToPtr(*volatile Mmio(32, packed struct { /// ATTSETx ATTSETx: u8, /// ATTWAITx @@ -32640,7 +32640,7 @@ pub const registers = struct { /// address: 0xa0000474 /// ECC result register 2 - pub const ECCR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ECCR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ECCx ECCx: u32, }), base_address + 0x74); @@ -32648,7 +32648,7 @@ pub const registers = struct { /// address: 0xa0000480 /// PC Card/NAND Flash control register /// 3 - pub const PCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR3 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -32685,7 +32685,7 @@ pub const registers = struct { /// address: 0xa0000484 /// FIFO status and interrupt register /// 3 - pub const SR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR3 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -32730,7 +32730,7 @@ pub const registers = struct { /// address: 0xa0000488 /// Common memory space timing register /// 3 - pub const PMEM3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM3 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -32744,7 +32744,7 @@ pub const registers = struct { /// address: 0xa000048c /// Attribute memory space timing register /// 3 - pub const PATT3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT3 = @intToPtr(*volatile Mmio(32, packed struct { /// ATTSETx ATTSETx: u8, /// ATTWAITx @@ -32757,7 +32757,7 @@ pub const registers = struct { /// address: 0xa0000494 /// ECC result register 3 - pub const ECCR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ECCR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ECCx ECCx: u32, }), base_address + 0x94); @@ -32765,7 +32765,7 @@ pub const registers = struct { /// address: 0xa00004a0 /// PC Card/NAND Flash control register /// 4 - pub const PCR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PCR4 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// PWAITEN PWAITEN: u1, @@ -32802,7 +32802,7 @@ pub const registers = struct { /// address: 0xa00004a4 /// FIFO status and interrupt register /// 4 - pub const SR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SR4 = @intToPtr(*volatile Mmio(32, packed struct { /// IRS IRS: u1, /// ILS @@ -32847,7 +32847,7 @@ pub const registers = struct { /// address: 0xa00004a8 /// Common memory space timing register /// 4 - pub const PMEM4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PMEM4 = @intToPtr(*volatile Mmio(32, packed struct { /// MEMSETx MEMSETx: u8, /// MEMWAITx @@ -32861,7 +32861,7 @@ pub const registers = struct { /// address: 0xa00004ac /// Attribute memory space timing register /// 4 - pub const PATT4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PATT4 = @intToPtr(*volatile Mmio(32, packed struct { /// ATTSETx ATTSETx: u8, /// ATTWAITx @@ -32874,7 +32874,7 @@ pub const registers = struct { /// address: 0xa00004b0 /// I/O space timing register 4 - pub const PIO4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const PIO4 = @intToPtr(*volatile Mmio(32, packed struct { /// IOSETx IOSETx: u8, /// IOWAITx @@ -32888,7 +32888,7 @@ pub const registers = struct { /// address: 0xa0000504 /// SRAM/NOR-Flash write timing registers /// 1 - pub const BWTR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32911,7 +32911,7 @@ pub const registers = struct { /// address: 0xa000050c /// SRAM/NOR-Flash write timing registers /// 2 - pub const BWTR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32934,7 +32934,7 @@ pub const registers = struct { /// address: 0xa0000514 /// SRAM/NOR-Flash write timing registers /// 3 - pub const BWTR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR3 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32957,7 +32957,7 @@ pub const registers = struct { /// address: 0xa000051c /// SRAM/NOR-Flash write timing registers /// 4 - pub const BWTR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const BWTR4 = @intToPtr(*volatile Mmio(32, packed struct { /// ADDSET ADDSET: u4, /// ADDHLD @@ -32984,21 +32984,21 @@ pub const registers = struct { /// address: 0xe000e100 /// Interrupt Set-Enable Register - pub const ISER0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISER0 = @intToPtr(*volatile Mmio(32, packed struct { /// SETENA SETENA: u32, }), base_address + 0x0); /// address: 0xe000e104 /// Interrupt Set-Enable Register - pub const ISER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISER1 = @intToPtr(*volatile Mmio(32, packed struct { /// SETENA SETENA: u32, }), base_address + 0x4); /// address: 0xe000e108 /// Interrupt Set-Enable Register - pub const ISER2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISER2 = @intToPtr(*volatile Mmio(32, packed struct { /// SETENA SETENA: u32, }), base_address + 0x8); @@ -33006,7 +33006,7 @@ pub const registers = struct { /// address: 0xe000e180 /// Interrupt Clear-Enable /// Register - pub const ICER0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICER0 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRENA CLRENA: u32, }), base_address + 0x80); @@ -33014,7 +33014,7 @@ pub const registers = struct { /// address: 0xe000e184 /// Interrupt Clear-Enable /// Register - pub const ICER1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICER1 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRENA CLRENA: u32, }), base_address + 0x84); @@ -33022,28 +33022,28 @@ pub const registers = struct { /// address: 0xe000e188 /// Interrupt Clear-Enable /// Register - pub const ICER2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICER2 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRENA CLRENA: u32, }), base_address + 0x88); /// address: 0xe000e200 /// Interrupt Set-Pending Register - pub const ISPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// SETPEND SETPEND: u32, }), base_address + 0x100); /// address: 0xe000e204 /// Interrupt Set-Pending Register - pub const ISPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// SETPEND SETPEND: u32, }), base_address + 0x104); /// address: 0xe000e208 /// Interrupt Set-Pending Register - pub const ISPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ISPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// SETPEND SETPEND: u32, }), base_address + 0x108); @@ -33051,7 +33051,7 @@ pub const registers = struct { /// address: 0xe000e280 /// Interrupt Clear-Pending /// Register - pub const ICPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRPEND CLRPEND: u32, }), base_address + 0x180); @@ -33059,7 +33059,7 @@ pub const registers = struct { /// address: 0xe000e284 /// Interrupt Clear-Pending /// Register - pub const ICPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRPEND CLRPEND: u32, }), base_address + 0x184); @@ -33067,35 +33067,35 @@ pub const registers = struct { /// address: 0xe000e288 /// Interrupt Clear-Pending /// Register - pub const ICPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// CLRPEND CLRPEND: u32, }), base_address + 0x188); /// address: 0xe000e300 /// Interrupt Active Bit Register - pub const IABR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IABR0 = @intToPtr(*volatile Mmio(32, packed struct { /// ACTIVE ACTIVE: u32, }), base_address + 0x200); /// address: 0xe000e304 /// Interrupt Active Bit Register - pub const IABR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IABR1 = @intToPtr(*volatile Mmio(32, packed struct { /// ACTIVE ACTIVE: u32, }), base_address + 0x204); /// address: 0xe000e308 /// Interrupt Active Bit Register - pub const IABR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IABR2 = @intToPtr(*volatile Mmio(32, packed struct { /// ACTIVE ACTIVE: u32, }), base_address + 0x208); /// address: 0xe000e400 /// Interrupt Priority Register - pub const IPR0 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR0 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33108,7 +33108,7 @@ pub const registers = struct { /// address: 0xe000e404 /// Interrupt Priority Register - pub const IPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33121,7 +33121,7 @@ pub const registers = struct { /// address: 0xe000e408 /// Interrupt Priority Register - pub const IPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR2 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33134,7 +33134,7 @@ pub const registers = struct { /// address: 0xe000e40c /// Interrupt Priority Register - pub const IPR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR3 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33147,7 +33147,7 @@ pub const registers = struct { /// address: 0xe000e410 /// Interrupt Priority Register - pub const IPR4 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR4 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33160,7 +33160,7 @@ pub const registers = struct { /// address: 0xe000e414 /// Interrupt Priority Register - pub const IPR5 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR5 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33173,7 +33173,7 @@ pub const registers = struct { /// address: 0xe000e418 /// Interrupt Priority Register - pub const IPR6 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR6 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33186,7 +33186,7 @@ pub const registers = struct { /// address: 0xe000e41c /// Interrupt Priority Register - pub const IPR7 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR7 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33199,7 +33199,7 @@ pub const registers = struct { /// address: 0xe000e420 /// Interrupt Priority Register - pub const IPR8 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR8 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33212,7 +33212,7 @@ pub const registers = struct { /// address: 0xe000e424 /// Interrupt Priority Register - pub const IPR9 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR9 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33225,7 +33225,7 @@ pub const registers = struct { /// address: 0xe000e428 /// Interrupt Priority Register - pub const IPR10 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR10 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33238,7 +33238,7 @@ pub const registers = struct { /// address: 0xe000e42c /// Interrupt Priority Register - pub const IPR11 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR11 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33251,7 +33251,7 @@ pub const registers = struct { /// address: 0xe000e430 /// Interrupt Priority Register - pub const IPR12 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR12 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33264,7 +33264,7 @@ pub const registers = struct { /// address: 0xe000e434 /// Interrupt Priority Register - pub const IPR13 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR13 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33277,7 +33277,7 @@ pub const registers = struct { /// address: 0xe000e438 /// Interrupt Priority Register - pub const IPR14 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR14 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33290,7 +33290,7 @@ pub const registers = struct { /// address: 0xe000e43c /// Interrupt Priority Register - pub const IPR15 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR15 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33303,7 +33303,7 @@ pub const registers = struct { /// address: 0xe000e440 /// Interrupt Priority Register - pub const IPR16 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR16 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33316,7 +33316,7 @@ pub const registers = struct { /// address: 0xe000e444 /// Interrupt Priority Register - pub const IPR17 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR17 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33329,7 +33329,7 @@ pub const registers = struct { /// address: 0xe000e448 /// Interrupt Priority Register - pub const IPR18 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR18 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33342,7 +33342,7 @@ pub const registers = struct { /// address: 0xe000e44c /// Interrupt Priority Register - pub const IPR19 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR19 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33355,7 +33355,7 @@ pub const registers = struct { /// address: 0xe000e450 /// Interrupt Priority Register - pub const IPR20 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const IPR20 = @intToPtr(*volatile Mmio(32, packed struct { /// IPR_N0 IPR_N0: u8, /// IPR_N1 @@ -33373,7 +33373,7 @@ pub const registers = struct { /// address: 0xe000ef34 /// Floating-point context control /// register - pub const FPCCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FPCCR = @intToPtr(*volatile Mmio(32, packed struct { /// LSPACT LSPACT: u1, /// USER @@ -33420,7 +33420,7 @@ pub const registers = struct { /// address: 0xe000ef38 /// Floating-point context address /// register - pub const FPCAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FPCAR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -33432,7 +33432,7 @@ pub const registers = struct { /// address: 0xe000ef3c /// Floating-point status control /// register - pub const FPSCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const FPSCR = @intToPtr(*volatile Mmio(32, packed struct { /// Invalid operation cumulative exception /// bit IOC: u1, @@ -33498,7 +33498,7 @@ pub const registers = struct { /// address: 0xe000ed90 /// MPU type register - pub const MPU_TYPER = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MPU_TYPER = @intToPtr(*volatile Mmio(32, packed struct { /// Separate flag SEPARATE: u1, reserved0: u1, @@ -33525,7 +33525,7 @@ pub const registers = struct { /// address: 0xe000ed94 /// MPU control register - pub const MPU_CTRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MPU_CTRL = @intToPtr(*volatile Mmio(32, packed struct { /// Enables the MPU ENABLE: u1, /// Enables the operation of MPU during hard @@ -33567,7 +33567,7 @@ pub const registers = struct { /// address: 0xe000ed98 /// MPU region number register - pub const MPU_RNR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MPU_RNR = @intToPtr(*volatile Mmio(32, packed struct { /// MPU region REGION: u8, padding0: u1, @@ -33599,7 +33599,7 @@ pub const registers = struct { /// address: 0xe000ed9c /// MPU region base address /// register - pub const MPU_RBAR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MPU_RBAR = @intToPtr(*volatile Mmio(32, packed struct { /// MPU region field REGION: u4, /// MPU region number valid @@ -33611,7 +33611,7 @@ pub const registers = struct { /// address: 0xe000eda0 /// MPU region attribute and size /// register - pub const MPU_RASR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const MPU_RASR = @intToPtr(*volatile Mmio(32, packed struct { /// Region enable bit. ENABLE: u1, /// Size of the MPU protection @@ -33649,7 +33649,7 @@ pub const registers = struct { /// address: 0xe000e010 /// SysTick control and status /// register - pub const CTRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CTRL = @intToPtr(*volatile Mmio(32, packed struct { /// Counter enable ENABLE: u1, /// SysTick exception request @@ -33691,7 +33691,7 @@ pub const registers = struct { /// address: 0xe000e014 /// SysTick reload value register - pub const LOAD = @intToPtr(*volatile Mmio(32, packed struct{ + pub const LOAD = @intToPtr(*volatile Mmio(32, packed struct { /// RELOAD value RELOAD: u24, padding0: u1, @@ -33706,7 +33706,7 @@ pub const registers = struct { /// address: 0xe000e018 /// SysTick current value register - pub const VAL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const VAL = @intToPtr(*volatile Mmio(32, packed struct { /// Current counter value CURRENT: u24, padding0: u1, @@ -33722,7 +33722,7 @@ pub const registers = struct { /// address: 0xe000e01c /// SysTick calibration value /// register - pub const CALIB = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CALIB = @intToPtr(*volatile Mmio(32, packed struct { /// Calibration value TENMS: u24, reserved0: u1, @@ -33744,7 +33744,7 @@ pub const registers = struct { /// address: 0xe000ed00 /// CPUID base register - pub const CPUID = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPUID = @intToPtr(*volatile Mmio(32, packed struct { /// Revision number Revision: u4, /// Part number of the @@ -33761,7 +33761,7 @@ pub const registers = struct { /// address: 0xe000ed04 /// Interrupt control and state /// register - pub const ICSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ICSR = @intToPtr(*volatile Mmio(32, packed struct { /// Active vector VECTACTIVE: u9, reserved0: u1, @@ -33795,7 +33795,7 @@ pub const registers = struct { /// address: 0xe000ed08 /// Vector table offset register - pub const VTOR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const VTOR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -33815,7 +33815,7 @@ pub const registers = struct { /// address: 0xe000ed0c /// Application interrupt and reset control /// register - pub const AIRCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AIRCR = @intToPtr(*volatile Mmio(32, packed struct { /// VECTRESET VECTRESET: u1, /// VECTCLRACTIVE @@ -33841,7 +33841,7 @@ pub const registers = struct { /// address: 0xe000ed10 /// System control register - pub const SCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SCR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// SLEEPONEXIT SLEEPONEXIT: u1, @@ -33882,7 +33882,7 @@ pub const registers = struct { /// address: 0xe000ed14 /// Configuration and control /// register - pub const CCR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CCR = @intToPtr(*volatile Mmio(32, packed struct { /// Configures how the processor enters /// Thread mode NONBASETHRDENA: u1, @@ -33927,7 +33927,7 @@ pub const registers = struct { /// address: 0xe000ed18 /// System handler priority /// registers - pub const SHPR1 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHPR1 = @intToPtr(*volatile Mmio(32, packed struct { /// Priority of system handler /// 4 PRI_4: u8, @@ -33950,7 +33950,7 @@ pub const registers = struct { /// address: 0xe000ed1c /// System handler priority /// registers - pub const SHPR2 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHPR2 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -33983,7 +33983,7 @@ pub const registers = struct { /// address: 0xe000ed20 /// System handler priority /// registers - pub const SHPR3 = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHPR3 = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -34011,7 +34011,7 @@ pub const registers = struct { /// address: 0xe000ed24 /// System handler control and state /// register - pub const SHCRS = @intToPtr(*volatile Mmio(32, packed struct{ + pub const SHCRS = @intToPtr(*volatile Mmio(32, packed struct { /// Memory management fault exception active /// bit MEMFAULTACT: u1, @@ -34072,7 +34072,7 @@ pub const registers = struct { /// address: 0xe000ed28 /// Configurable fault status /// register - pub const CFSR_UFSR_BFSR_MMFSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CFSR_UFSR_BFSR_MMFSR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Instruction access violation /// flag @@ -34139,7 +34139,7 @@ pub const registers = struct { /// address: 0xe000ed2c /// Hard fault status register - pub const HFSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const HFSR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, /// Vector table hard fault VECTTBL: u1, @@ -34189,7 +34189,7 @@ pub const registers = struct { /// address: 0xe000ed3c /// Auxiliary fault status /// register - pub const AFSR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const AFSR = @intToPtr(*volatile Mmio(32, packed struct { /// Implementation defined IMPDEF: u32, }), base_address + 0x3c); @@ -34202,7 +34202,7 @@ pub const registers = struct { /// address: 0xe000ef00 /// Software trigger interrupt /// register - pub const STIR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const STIR = @intToPtr(*volatile Mmio(32, packed struct { /// Software generated interrupt /// ID INTID: u9, @@ -34238,7 +34238,7 @@ pub const registers = struct { /// address: 0xe000ed88 /// Coprocessor access control /// register - pub const CPACR = @intToPtr(*volatile Mmio(32, packed struct{ + pub const CPACR = @intToPtr(*volatile Mmio(32, packed struct { reserved0: u1, reserved1: u1, reserved2: u1, @@ -34277,7 +34277,7 @@ pub const registers = struct { /// address: 0xe000e008 /// Auxiliary control register - pub const ACTRL = @intToPtr(*volatile Mmio(32, packed struct{ + pub const ACTRL = @intToPtr(*volatile Mmio(32, packed struct { /// DISMCYCINT DISMCYCINT: u1, /// DISDEFWBUF