From cfafbe9d5b2b866120b94b9c6a85bc0acc4ea1e5 Mon Sep 17 00:00:00 2001 From: ElicMagus Date: Fri, 7 Apr 2023 20:20:48 +0300 Subject: [PATCH] LED PAC --- out.bin | Bin 504 -> 532 bytes out.hex | 38 ++++++++++++++++++++------------------ src/main.rs | 43 ++++++++++++++++++++----------------------- 3 files changed, 40 insertions(+), 41 deletions(-) diff --git a/out.bin b/out.bin index a0e67b65485c7fe970aaf1b92ba1d0aa20d90fee..8865467113879d96369f75e74761c4e952af87ff 100644 GIT binary patch delta 238 zcmeytJcVU~6BC2fL>C+B1Hy_Yr!z1xJa2d)WX{T%0< zt**)pTN%tnnH+e0CqHFn4?sRE&%y1k{6G^}RRUav)6^IOj_S2Z u9;y|q{TJX`It#>0y$0f)-Ojjxae>n0nT+~I3=A6>AsFapI2$B}iw^+yPC{1z delta 204 zcmbQj@`HJT6H|i3L>C)r1tGYzNYlTUjU0mSt*{pSVko z=>hM=TT$`JY{FAT8CV-Px+d3bW#D23Dr1=3+A5 ! { - let RCC_APB2PCENR: *mut u32 = 0x4002_1018 as _; - let GPIOC_CFGLR: *mut u32 = 0x4001_1000 as _; - let GPIOC_OUTDR: *mut u32 = 0x4001_100C as _; - - unsafe { - RCC_APB2PCENR.write_volatile(0b1_0000); - // Write 0b0001 to pin 1 configuration - GPIOC_CFGLR.write_volatile(0b0101_0000); - + let p = unsafe { ch32v003_pac::Peripherals::steal()}; + // Enable GPIOC bank + p.RCC.apb2pcenr.modify(|_, w| w.iopcen().set_bit()); + // Configure GPIOC pin 1 + p.GPIOC.cfglr.modify(|_, w| { + w.cnf1().variant(0b01) // Open-Drain + .mode1().variant(0b01) // Output, 10Mhz + }); loop { - // Set pin 1 to high - GPIOC_OUTDR.write_volatile(0b1_0); - for _ in 0..1_000_000 { - core::hint::black_box(()); // Do nothing, but keep the loop - } - - // Set pin 1 to low - GPIOC_OUTDR.write_volatile(0b0_0); + // Turn pin 1 on + p.GPIOC.outdr.modify(|_, w| w.odr1().set_bit()); + for _ in 0..1_000_000 { + core::hint::black_box(()); + } - for _ in 0..1_000_000 { - core::hint::black_box(()); // Do nothing, but keep the loop - } + // Turn pin 1 off + p.GPIOC.outdr.modify(|_, w| w.odr1().clear_bit()); + for _ in 0..1_000_000 { + core::hint::black_box(()); + } } - } +} -} \ No newline at end of file