diff --git a/.gitignore b/.gitignore
index 2f88dba..3b37a3e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,4 @@
 /target
+/output
 **/*.rs.bk
 Cargo.lock
\ No newline at end of file
diff --git a/.sync-exclude.lst b/.sync-exclude.lst
index 5549a2e..a8e300d 100644
--- a/.sync-exclude.lst
+++ b/.sync-exclude.lst
@@ -1,2 +1,4 @@
 target/*
-target/
\ No newline at end of file
+target/
+output/*
+output/
\ No newline at end of file
diff --git a/Cargo.toml b/Cargo.toml
index 91e0b1c..54f1351 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -7,7 +7,7 @@ version = "0.1.0"
 [dependencies]
 ch32v003-pac = { path = "./ch32v003-pac", features = ["rt"] }
 # ch32v003-rt = { path = "./ch32v003-rt" }
-riscv-rt = "0.11"
+riscv-rt = "0.11.0"
 panic-halt = "0.2.0"
 
 [patch.crates-io]
diff --git a/Intel HEX to BIN_Convertor.zip b/Intel HEX to BIN_Convertor.zip
deleted file mode 100644
index f87fb99..0000000
Binary files a/Intel HEX to BIN_Convertor.zip and /dev/null differ
diff --git a/build.bat b/build.bat
index f479e59..6ff9f44 100644
--- a/build.bat
+++ b/build.bat
@@ -1,3 +1,5 @@
 cargo build --release
-llvm-objcopy -O ihex target/riscv32ec-unknown-none-elf/release/ch32v003-experiments out.hex
-llvm-objcopy -O binary target/riscv32ec-unknown-none-elf/release/ch32v003-experiments out.bin
\ No newline at end of file
+mkdir output
+llvm-objcopy -O ihex target/riscv32ec-unknown-none-elf/release/ch32v003-experiments output/out.hex
+llvm-objcopy -O binary target/riscv32ec-unknown-none-elf/release/ch32v003-experiments output/out.bin
+llvm-objdump -D target/riscv32ec-unknown-none-elf/release/ch32v003-experiments > output/out.list
\ No newline at end of file
diff --git a/out.bin b/out.bin
deleted file mode 100644
index 8865467..0000000
Binary files a/out.bin and /dev/null differ
diff --git a/out.hex b/out.hex
deleted file mode 100644
index 6cf7958..0000000
--- a/out.hex
+++ /dev/null
@@ -1,35 +0,0 @@
-:10000000B700000067808000735040307350403468
-:1000100081400141814101428142014381430144C8
-:100020008144814601478147970100209381817D6A
-:10003000F32340F1B70200009382020063F47200E0
-:100040006F00001A170100201301C17BB7020000E6
-:1000500093820240638603001E837D13E31F03FE29
-:1000600033015140330401006F004000411106C6C6
-:100070000008137101FF732540F197000000E7802D
-:10008000C01321C997000000E780E0123705002067
-:1000900013050500B7050020938545006377B5007B
-:1000A000232005001105E36DB5FE3705002013057B
-:1000B0000500B7050000938545213706002013068B
-:1000C00006006378C500944114C111059105E36CE5
-:1000D000C5FE97000000E780800F97000000E780D2
-:1000E00060080000397106C016C21AC41EC62AC8AC
-:1000F0002ECA32CC36CE3AD03ED233050100EF00C4
-:100100000002824092422243B2434245D2456246B7
-:10011000F2460257925713014102730020300A84BD
-:10012000137101FFF325203463C7050022811703F3
-:10013000000067000308139515000581B145637C35
-:10014000B5000A05B70500009385451E2E951C4194
-:1001500099C32281828722811703000067008305EB
-:100160003705002085452300B500371502400C4DAA
-:1001700093E505010CCD371501400C4193F5F5F0E1
-:1001800093E505050CC1B7450F009385052450453F
-:100190001366260050C52E8619C27D167DFE504579
-:1001A000759A50C52E8665D67D167DFECDB701A009
-:1001B00001A0228182800A84137101FF01C57300AE
-:1001C0005010F5BF0545228182800A84137101FF1A
-:1001D000370500001305450E7310553022818280CB
-:0201E00001A07C
-:1001E400B0010000B001000000000000B0010000F8
-:1001F400B0010000B001000000000000B0010000E8
-:10020400B0010000B001000000000000B0010000D7
-:00000001FF
diff --git a/src/main.rs b/src/main.rs
index 2050e42..49a3137 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -3,24 +3,33 @@
 
 use panic_halt as _;
 use riscv_rt::entry;
-use ch32v003_pac::{gpioc,rcc};
+
+pub struct huart{
+    boudrate:u32
+}
 
 // entry!(main);
 #[entry]
 fn main() -> ! {
-    let p = unsafe { ch32v003_pac::Peripherals::steal()};
-  // Enable GPIOC bank
-  p.RCC.apb2pcenr.modify(|_, w| w.iopcen().set_bit());
-      // Configure GPIOC pin 1
-      p.GPIOC.cfglr.modify(|_, w| {
+    let mut p = unsafe { ch32v003_pac::Peripherals::steal()};
+    // Enable GPIOC bank
+    p.RCC.apb2pcenr.modify(|_, w| w.iopcen().set_bit());
+
+     // Configure GPIOC pin 1
+    p.GPIOC.cfglr.modify(|_, w| {
         w.cnf1().variant(0b01) // Open-Drain
-         .mode1().variant(0b01) // Output, 10Mhz
+        .mode1().variant(0b01) // Output, 10Mhz
     });
-        loop {
-                    // Turn pin 1 on
+
+    uart_init(&mut p);
+
+
+    
+    loop {
+    // Turn pin 1 on
         p.GPIOC.outdr.modify(|_, w| w.odr1().set_bit());
         for _ in 0..1_000_000 {
-            core::hint::black_box(());
+        core::hint::black_box(());
         }
 
         // Turn pin 1 off
@@ -28,6 +37,43 @@ fn main() -> ! {
         for _ in 0..1_000_000 {
             core::hint::black_box(());
         }
-        }
+    }
 }
 
+fn uart_init(p:&mut ch32v003_pac::Peripherals){
+    // Enable GPIOD
+    p.RCC.apb2pcenr.modify(|_,w| w.iopden().set_bit());
+    p.RCC.apb2pcenr.modify(|_,w| w.usart1en().set_bit());
+    p.GPIOD.cfglr.modify(|_, w| {
+        w.cnf5().variant(0b10) //TX - Output PushPull
+        .mode5().variant(0b11) //50 MHz
+    });
+    p.GPIOD.cfglr.modify(|_, w| {
+        w.cnf6().variant(0b01) //RX - Floating Input
+        .mode6().variant(0b00) //Input Mode
+    });
+
+    p.USART1.ctlr2.modify(|_,w| {
+        w.stop().variant(0b00)
+    });
+
+    p.USART1.ctlr1.modify(|_,w| {
+        w
+        .m().clear_bit()
+        .pce().clear_bit()
+        .te().set_bit()
+        .re().set_bit()
+    });
+
+    p.USART1.ctlr3.modify(|_,w| {
+        unsafe { w.bits(0x0000) }
+    });
+
+    p.USART1.ctlr1.modify(|_,w| {
+        w
+        .ue().set_bit()
+    });
+
+    //set boudrate
+    
+}
\ No newline at end of file